PIC10F220
Author: Molnár Károly

All Enhanced Extended Regular 12 bits 14 bits 16 bits RAM
size ROM
size EEPROM
size Common
SFRs
Features Configuration Bits RAM map SFR map

PIC10F220
CONFIG (address:0x0FFF, mask:0x001F, default:0x001F)
IOSCFS -- Internal Oscillator Frequency Select bit (bitmask:0x0001)
IOSCFS = 4MHZ | 0x0FFE | 4 MHz.
IOSCFS = 8MHZ | 0x0FFF | 8 MHz.
IOFSCS -- Internal Oscillator Frequency Select bit (bitmask:0x0001)
IOFSCS = 4MHZ | 0x0FFE | 4 MHz.
IOFSCS = 8MHZ | 0x0FFF | 8 MHz.
MCPU -- Master Clear Pull-up Enable bit (bitmask:0x0002)
MCPU = ON | 0x0FFD | Pull-up enabled.
MCPU = OFF | 0x0FFF | Pull-up disabled.
WDTE -- Watchdog Timer Enable bit (bitmask:0x0004)
WDTE = OFF | 0x0FFB | WDT disabled.
WDTE = ON | 0x0FFF | WDT enabled.
CP -- Code protection bit (bitmask:0x0008)
CP = ON | 0x0FF7 | Code protection on.
CP = OFF | 0x0FFF | Code protection off.
MCLRE -- GP3/MCLR Pin Function Select bit (bitmask:0x0010)
MCLRE = OFF | 0x0FEF | GP3/MCLR pin function is digital I/O, MCLR internally tied to VDD.
MCLRE = ON | 0x0FFF | GP3/MCLR pin function is MCLR.

This page generated automatically by the device-help.pl program (2022-01-30 15:56:09 UTC) from the 8bit_device.info file (rev: 1.44) of mpasmx and from the gputils source package (rev: svn Unversioned directory). The mpasmx is included in the MPLAB X.