/* Generated automatically by the program `genconstants'
   from the machine description file `md'.  */

#ifndef GCC_INSN_CONSTANTS_H
#define GCC_INSN_CONSTANTS_H

#define FCC0_REGNUM 64
#define T0_REGNUM 12
#define FCC4_REGNUM 68
#define RETURN_ADDR_REGNUM 1
#define SIBCALL_RETURN 1
#define FCC7_REGNUM 71
#define EXCEPTION_RETURN 2
#define FCC6_REGNUM 70
#define FCC3_REGNUM 67
#define FCC2_REGNUM 66
#define T1_REGNUM 13
#define TP_REGNUM 2
#define MAX_PIC_BRANCH_LENGTH 100
#define NORMAL_RETURN 0
#define FCC5_REGNUM 69
#define S0_REGNUM 23
#define FCC1_REGNUM 65

enum unspec {
  UNSPEC_LOAD_LOW = 0,
  UNSPEC_LOAD_HIGH = 1,
  UNSPEC_STORE_WORD = 2,
  UNSPEC_MOVGR2FRH = 3,
  UNSPEC_MOVFRH2GR = 4,
  UNSPEC_FRINT = 5,
  UNSPEC_FCLASS = 6,
  UNSPEC_FMAX = 7,
  UNSPEC_FMIN = 8,
  UNSPEC_FTINT = 9,
  UNSPEC_FTINTRM = 10,
  UNSPEC_FTINTRP = 11,
  UNSPEC_FSCALEB = 12,
  UNSPEC_FLOGB = 13,
  UNSPEC_EH_RETURN = 14,
  UNSPEC_BITREV_4B = 15,
  UNSPEC_BITREV_8B = 16,
  UNSPEC_TLS = 17,
  UNSPEC_TLS_DESC = 18,
  UNSPEC_TLS_DESC_OFF64 = 19,
  UNSPEC_TIE = 20,
  UNSPEC_RSQRT = 21,
  UNSPEC_RSQRTE = 22,
  UNSPEC_RECIPE = 23,
  UNSPEC_CRC = 24,
  UNSPEC_CRCC = 25,
  UNSPEC_LOAD_FROM_GOT = 26,
  UNSPEC_PCALAU12I = 27,
  UNSPEC_PCALAU12I_GR = 28,
  UNSPEC_ADD_TLS_LE_RELAX = 29,
  UNSPEC_ORI_L_LO12 = 30,
  UNSPEC_LUI_L_HI20 = 31,
  UNSPEC_LUI_H_LO20 = 32,
  UNSPEC_LUI_H_HI12 = 33,
  UNSPEC_TLS_LOW = 34,
  UNSPEC_FAKE_ANY_DIV = 35,
  UNSPEC_SIBCALL_VALUE_MULTIPLE_INTERNAL_1 = 36,
  UNSPEC_CALL_VALUE_MULTIPLE_INTERNAL_1 = 37,
  UNSPEC_LOAD_SYMBOL_OFFSET64 = 38,
  UNSPEC_LA_PCREL_64_PART1 = 39,
  UNSPEC_LA_PCREL_64_PART2 = 40,
  UNSPEC_SSP = 41,
  UNSPEC_COMPARE_AND_SWAP = 42,
  UNSPEC_COMPARE_AND_SWAP_AMCAS = 43,
  UNSPEC_COMPARE_AND_SWAP_ADD = 44,
  UNSPEC_COMPARE_AND_SWAP_SUB = 45,
  UNSPEC_COMPARE_AND_SWAP_NAND = 46,
  UNSPEC_SYNC_OLD_OP = 47,
  UNSPEC_SYNC_EXCHANGE = 48,
  UNSPEC_ATOMIC_STORE = 49,
  UNSPEC_ATOMIC_LOAD = 50,
  UNSPEC_MEMORY_BARRIER = 51,
  UNSPEC_TI_FETCH_ADD = 52,
  UNSPEC_TI_FETCH_SUB = 53,
  UNSPEC_TI_FETCH_AND = 54,
  UNSPEC_TI_FETCH_XOR = 55,
  UNSPEC_TI_FETCH_OR = 56,
  UNSPEC_TI_FETCH_NAND_MASK_INVERTED = 57,
  UNSPEC_SIMD_FRINTRP = 58,
  UNSPEC_SIMD_FRINTRZ = 59,
  UNSPEC_SIMD_FRINT = 60,
  UNSPEC_SIMD_FRINTRM = 61,
  UNSPEC_SIMD_FRINTRNE = 62,
  UNSPEC_SIMD_VSHUF = 63,
  UNSPEC_SIMD_FCMP_CAF = 64,
  UNSPEC_SIMD_FCMP_SAF = 65,
  UNSPEC_SIMD_FCMP_SEQ = 66,
  UNSPEC_SIMD_FCMP_SUN = 67,
  UNSPEC_SIMD_FCMP_SUEQ = 68,
  UNSPEC_SIMD_FCMP_CNE = 69,
  UNSPEC_SIMD_FCMP_SOR = 70,
  UNSPEC_SIMD_FCMP_SUNE = 71,
  UNSPEC_LSX_VAVG_S = 72,
  UNSPEC_LSX_VAVG_U = 73,
  UNSPEC_LSX_VAVGR_S = 74,
  UNSPEC_LSX_VAVGR_U = 75,
  UNSPEC_LSX_VBITCLR = 76,
  UNSPEC_LSX_VBITCLRI = 77,
  UNSPEC_LSX_VBITREV = 78,
  UNSPEC_LSX_VBITREVI = 79,
  UNSPEC_LSX_VBITSET = 80,
  UNSPEC_LSX_VBITSETI = 81,
  UNSPEC_LSX_BRANCH_V = 82,
  UNSPEC_LSX_BRANCH = 83,
  UNSPEC_LSX_VFCLASS = 84,
  UNSPEC_LSX_VFCVT = 85,
  UNSPEC_LSX_VFCVTH = 86,
  UNSPEC_LSX_VFCVTL = 87,
  UNSPEC_LSX_VFLOGB = 88,
  UNSPEC_LSX_VFRECIPE = 89,
  UNSPEC_LSX_VFRSQRT = 90,
  UNSPEC_LSX_VFRSQRTE = 91,
  UNSPEC_LSX_VFTINT_U = 92,
  UNSPEC_LSX_VSAT_S = 93,
  UNSPEC_LSX_VSAT_U = 94,
  UNSPEC_LSX_VSRAR = 95,
  UNSPEC_LSX_VSRLR = 96,
  UNSPEC_LSX_VEXTW_S = 97,
  UNSPEC_LSX_VEXTW_U = 98,
  UNSPEC_LSX_VSLLWIL_S = 99,
  UNSPEC_LSX_VSLLWIL_U = 100,
  UNSPEC_LSX_VSRAN = 101,
  UNSPEC_LSX_VSSRAN_S = 102,
  UNSPEC_LSX_VSSRAN_U = 103,
  UNSPEC_LSX_VSRAIN = 104,
  UNSPEC_LSX_VSRAINS_S = 105,
  UNSPEC_LSX_VSRAINS_U = 106,
  UNSPEC_LSX_VSRARN = 107,
  UNSPEC_LSX_VSRLN = 108,
  UNSPEC_LSX_VSRLRN = 109,
  UNSPEC_LSX_VSSRLRN_U = 110,
  UNSPEC_LSX_VFRSTPI = 111,
  UNSPEC_LSX_VFRSTP = 112,
  UNSPEC_LSX_VSHUF4I = 113,
  UNSPEC_LSX_VBSRL_V = 114,
  UNSPEC_LSX_VBSLL_V = 115,
  UNSPEC_LSX_VEXTRINS = 116,
  UNSPEC_LSX_VMSKLTZ = 117,
  UNSPEC_LSX_VSIGNCOV = 118,
  UNSPEC_LSX_VFTINT_W_D = 119,
  UNSPEC_LSX_VFTINTRP_W_D = 120,
  UNSPEC_LSX_VFTINTRM_W_D = 121,
  UNSPEC_LSX_VFTINTRNE_W_D = 122,
  UNSPEC_LSX_VFTINTL_L_S = 123,
  UNSPEC_LSX_VFTINTRPL_L_S = 124,
  UNSPEC_LSX_VFTINTRPH_L_S = 125,
  UNSPEC_LSX_VFTINTRMH_L_S = 126,
  UNSPEC_LSX_VFTINTRML_L_S = 127,
  UNSPEC_LSX_VFTINTRNEL_L_S = 128,
  UNSPEC_LSX_VFTINTRNEH_L_S = 129,
  UNSPEC_LSX_VFTINTH_L_H = 130,
  UNSPEC_LSX_VSSRARN_S = 131,
  UNSPEC_LSX_VSSRARN_U = 132,
  UNSPEC_LSX_VSSRLN_U = 133,
  UNSPEC_LSX_VSSRLN = 134,
  UNSPEC_LSX_VSSRLRN = 135,
  UNSPEC_LSX_VLDI = 136,
  UNSPEC_LSX_VSTX = 137,
  UNSPEC_LSX_VEXTL_QU_DU = 138,
  UNSPEC_LSX_VSETEQZ_V = 139,
  UNSPEC_LSX_VADD_Q = 140,
  UNSPEC_LSX_VSUB_Q = 141,
  UNSPEC_LSX_VEXTH_Q_D = 142,
  UNSPEC_LSX_VEXTH_QU_DU = 143,
  UNSPEC_LSX_VMSKGEZ = 144,
  UNSPEC_LSX_VMSKNZ = 145,
  UNSPEC_LSX_VEXTL_Q_D = 146,
  UNSPEC_LSX_VSRLNI = 147,
  UNSPEC_LSX_VSRLRNI = 148,
  UNSPEC_LSX_VSSRLNI = 149,
  UNSPEC_LSX_VSSRLNI2 = 150,
  UNSPEC_LSX_VSSRLRNI = 151,
  UNSPEC_LSX_VSSRLRNI2 = 152,
  UNSPEC_LSX_VSRANI = 153,
  UNSPEC_LSX_VSRARNI = 154,
  UNSPEC_LSX_VSSRANI = 155,
  UNSPEC_LSX_VSSRANI2 = 156,
  UNSPEC_LSX_VSSRARNI = 157,
  UNSPEC_LSX_VSSRARNI2 = 158,
  UNSPEC_LSX_VPERMI = 159,
  UNSPEC_LSX_VILVL_INTERNAL = 160,
  UNSPEC_LSX_VREPLVEI_MIRROR = 161,
  UNSPEC_LASX_XVAVG_S = 162,
  UNSPEC_LASX_XVAVG_U = 163,
  UNSPEC_LASX_XVAVGR_S = 164,
  UNSPEC_LASX_XVAVGR_U = 165,
  UNSPEC_LASX_XVBITCLR = 166,
  UNSPEC_LASX_XVBITCLRI = 167,
  UNSPEC_LASX_XVBITREV = 168,
  UNSPEC_LASX_XVBITREVI = 169,
  UNSPEC_LASX_XVBITSET = 170,
  UNSPEC_LASX_XVBITSETI = 171,
  UNSPEC_LASX_XVFCLASS = 172,
  UNSPEC_LASX_XVFCVT = 173,
  UNSPEC_LASX_XVFCVTH = 174,
  UNSPEC_LASX_XVFCVTL = 175,
  UNSPEC_LASX_XVFLOGB = 176,
  UNSPEC_LASX_XVFRECIPE = 177,
  UNSPEC_LASX_XVFRSQRT = 178,
  UNSPEC_LASX_XVFRSQRTE = 179,
  UNSPEC_LASX_XVFTINT_U = 180,
  UNSPEC_LASX_XVSAT_S = 181,
  UNSPEC_LASX_XVSAT_U = 182,
  UNSPEC_LASX_XVREPL128VEI = 183,
  UNSPEC_LASX_XVSRAR = 184,
  UNSPEC_LASX_XVSRLR = 185,
  UNSPEC_LASX_BRANCH = 186,
  UNSPEC_LASX_BRANCH_V = 187,
  UNSPEC_LASX_XVSLLWIL_S = 188,
  UNSPEC_LASX_XVSLLWIL_U = 189,
  UNSPEC_LASX_XVSRAN = 190,
  UNSPEC_LASX_XVSSRAN_S = 191,
  UNSPEC_LASX_XVSSRAN_U = 192,
  UNSPEC_LASX_XVSRARN = 193,
  UNSPEC_LASX_XVSSRARN_S = 194,
  UNSPEC_LASX_XVSSRARN_U = 195,
  UNSPEC_LASX_XVSRLN = 196,
  UNSPEC_LASX_XVSSRLN_U = 197,
  UNSPEC_LASX_XVSRLRN = 198,
  UNSPEC_LASX_XVSSRLRN_U = 199,
  UNSPEC_LASX_XVFRSTPI = 200,
  UNSPEC_LASX_XVFRSTP = 201,
  UNSPEC_LASX_XVSHUF4I = 202,
  UNSPEC_LASX_XVBSRL_V = 203,
  UNSPEC_LASX_XVBSLL_V = 204,
  UNSPEC_LASX_XVEXTRINS = 205,
  UNSPEC_LASX_XVMSKLTZ = 206,
  UNSPEC_LASX_XVSIGNCOV = 207,
  UNSPEC_LASX_XVFTINT_W_D = 208,
  UNSPEC_LASX_XVFFINT_S_L = 209,
  UNSPEC_LASX_XVFTINTRZ_W_D = 210,
  UNSPEC_LASX_XVFTINTRP_W_D = 211,
  UNSPEC_LASX_XVFTINTRM_W_D = 212,
  UNSPEC_LASX_XVFTINTRNE_W_D = 213,
  UNSPEC_LASX_XVFTINTH_L_S = 214,
  UNSPEC_LASX_XVFTINTL_L_S = 215,
  UNSPEC_LASX_XVFFINTH_D_W = 216,
  UNSPEC_LASX_XVFFINTL_D_W = 217,
  UNSPEC_LASX_XVFTINTRZH_L_S = 218,
  UNSPEC_LASX_XVFTINTRZL_L_S = 219,
  UNSPEC_LASX_XVFTINTRPH_L_S = 220,
  UNSPEC_LASX_XVFTINTRPL_L_S = 221,
  UNSPEC_LASX_XVFTINTRMH_L_S = 222,
  UNSPEC_LASX_XVFTINTRML_L_S = 223,
  UNSPEC_LASX_XVFTINTRNEL_L_S = 224,
  UNSPEC_LASX_XVFTINTRNEH_L_S = 225,
  UNSPEC_LASX_XVREPLVE0_Q = 226,
  UNSPEC_LASX_XVPERM_W = 227,
  UNSPEC_LASX_XVPERMI_Q = 228,
  UNSPEC_LASX_XVPERMI_D = 229,
  UNSPEC_LASX_XVADD_Q = 230,
  UNSPEC_LASX_XVSUB_Q = 231,
  UNSPEC_LASX_XVREPLVE = 232,
  UNSPEC_LASX_XVMSKGEZ = 233,
  UNSPEC_LASX_XVMSKNZ = 234,
  UNSPEC_LASX_XVEXTH_Q_D = 235,
  UNSPEC_LASX_XVEXTH_QU_DU = 236,
  UNSPEC_LASX_XVEXTL_Q_D = 237,
  UNSPEC_LASX_XVSRLNI = 238,
  UNSPEC_LASX_XVSRLRNI = 239,
  UNSPEC_LASX_XVSSRLNI = 240,
  UNSPEC_LASX_XVSSRLNI2 = 241,
  UNSPEC_LASX_XVSSRLRNI = 242,
  UNSPEC_LASX_XVSSRLRNI2 = 243,
  UNSPEC_LASX_XVSRANI = 244,
  UNSPEC_LASX_XVSRARNI = 245,
  UNSPEC_LASX_XVSSRANI = 246,
  UNSPEC_LASX_XVSSRANI2 = 247,
  UNSPEC_LASX_XVSSRARNI = 248,
  UNSPEC_LASX_XVSSRARNI2 = 249,
  UNSPEC_LASX_XVPERMI = 250,
  UNSPEC_LASX_XVINSVE0 = 251,
  UNSPEC_LASX_XVPICKVE = 252,
  UNSPEC_LASX_XVSSRLN = 253,
  UNSPEC_LASX_XVSSRLRN = 254,
  UNSPEC_LASX_XVEXTL_QU_DU = 255,
  UNSPEC_LASX_XVLDI = 256,
  UNSPEC_LASX_XVSTX = 257,
  UNSPEC_LASX_VECINIT_MERGE = 258,
  UNSPEC_LASX_VEC_SET_INTERNAL = 259,
  UNSPEC_LASX_XVILVL_INTERNAL = 260,
  UNSPEC_ADDRESS_FIRST = 261
};
#define NUM_UNSPEC_VALUES 262
extern const char *const unspec_strings[];

enum unspecv {
  UNSPECV_BLOCKAGE = 0,
  UNSPECV_DBAR = 1,
  UNSPECV_IBAR = 2,
  UNSPECV_CSRRD = 3,
  UNSPECV_CSRWR = 4,
  UNSPECV_CSRXCHG = 5,
  UNSPECV_IOCSRRD = 6,
  UNSPECV_IOCSRWR = 7,
  UNSPECV_CACOP = 8,
  UNSPECV_LDDIR = 9,
  UNSPECV_LDPTE = 10,
  UNSPECV_ERTN = 11,
  UNSPECV_PROBE_STACK_RANGE = 12,
  UNSPECV_MOVFCSR2GR = 13,
  UNSPECV_MOVGR2FCSR = 14,
  UNSPECV_CPUCFG = 15,
  UNSPECV_ASRTLE_D = 16,
  UNSPECV_ASRTGT_D = 17,
  UNSPECV_SYSCALL = 18,
  UNSPECV_BREAK = 19
};
#define NUM_UNSPECV_VALUES 20
extern const char *const unspecv_strings[];

#endif /* GCC_INSN_CONSTANTS_H */
