This is nasm.info, produced by makeinfo version 4.8 from nasmdoc.texi.

INFO-DIR-SECTION Programming
START-INFO-DIR-ENTRY
* NASM: (nasm).                The Netwide Assembler for x86.
END-INFO-DIR-ENTRY

   This file documents NASM, the Netwide Assembler: an assembler
targetting the Intel x86 series of processors, with portable source.

   Copyright 1996-2010 The NASM Development Team

   This document is redistributable under the license given in the file
"LICENSE" distributed in the NASM archive.


File: nasm.info,  Node: Section 9.1.4,  Next: Section 9.2,  Prev: Section 9.1.3,  Up: Section 9.1

9.1.4. `c32.mac': Helper Macros for the 32-bit C Interface
----------------------------------------------------------

Included in the NASM archives, in the `misc' directory, is a file
`c32.mac' of macros. It defines three macros: `proc', `arg' and
`endproc'. These are intended to be used for C-style procedure
definitions, and they automate a lot of the work involved in keeping
track of the calling convention.

   An example of an assembly function using the macro set is given here:

     proc    _proc32

     %$i     arg
     %$j     arg
             mov     eax,[ebp + %$i]
             mov     ebx,[ebp + %$j]
             add     eax,[ebx]

     endproc

   This defines `_proc32' to be a procedure taking two arguments, the
first (`i') an integer and the second (`j') a pointer to an integer. It
returns `i + *j'.

   Note that the `arg' macro has an `EQU' as the first line of its
expansion, and since the label before the macro call gets prepended to
the first line of the expanded macro, the `EQU' works, defining `%$i'
to be an offset from `BP'. A context-local variable is used, local to
the context pushed by the `proc' macro and popped by the `endproc'
macro, so that the same argument name can be used in later procedures.
Of course, you don't _have_ to do that.

   `arg' can take an optional parameter, giving the size of the
argument.  If no size is given, 4 is assumed, since it is likely that
many function parameters will be of type `int' or pointers.


File: nasm.info,  Node: Section 9.2,  Next: Section 9.2.1,  Prev: Section 9.1.4,  Up: Chapter 9

9.2. Writing NetBSD/FreeBSD/OpenBSD and Linux/ELF Shared Libraries
==================================================================

`ELF' replaced the older `a.out' object file format under Linux because
it contains support for position-independent code (PIC), which makes
writing shared libraries much easier. NASM supports the `ELF'
position-independent code features, so you can write Linux `ELF' shared
libraries in NASM.

   NetBSD, and its close cousins FreeBSD and OpenBSD, take a different
approach by hacking PIC support into the `a.out' format. NASM supports
this as the `aoutb' output format, so you can write BSD shared
libraries in NASM too.

   The operating system loads a PIC shared library by memory-mapping the
library file at an arbitrarily chosen point in the address space of the
running process. The contents of the library's code section must
therefore not depend on where it is loaded in memory.

   Therefore, you cannot get at your variables by writing code like
this:

             mov     eax,[myvar]             ; WRONG

   Instead, the linker provides an area of memory called the _global
offset table_, or GOT; the GOT is situated at a constant distance from
your library's code, so if you can find out where your library is
loaded (which is typically done using a `CALL' and `POP' combination),
you can obtain the address of the GOT, and you can then load the
addresses of your variables out of linker-generated entries in the GOT.

   The _data_ section of a PIC shared library does not have these
restrictions: since the data section is writable, it has to be copied
into memory anyway rather than just paged in from the library file, so
as long as it's being copied it can be relocated too. So you can put
ordinary types of relocation in the data section without too much worry
(but see *Note Section 9.2.4:: for a caveat).

* Menu:

* Section 9.2.1:: Obtaining the Address of the GOT
* Section 9.2.2:: Finding Your Local Data Items
* Section 9.2.3:: Finding External and Common Data Items
* Section 9.2.4:: Exporting Symbols to the Library User
* Section 9.2.5:: Calling Procedures Outside the Library
* Section 9.2.6:: Generating the Library File


File: nasm.info,  Node: Section 9.2.1,  Next: Section 9.2.2,  Prev: Section 9.2,  Up: Section 9.2

9.2.1. Obtaining the Address of the GOT
---------------------------------------

Each code module in your shared library should define the GOT as an
external symbol:

     extern  _GLOBAL_OFFSET_TABLE_   ; in ELF
     extern  __GLOBAL_OFFSET_TABLE_  ; in BSD a.out

   At the beginning of any function in your shared library which plans
to access your data or BSS sections, you must first calculate the
address of the GOT. This is typically done by writing the function in
this form:

     func:   push    ebp
             mov     ebp,esp
             push    ebx
             call    .get_GOT
     .get_GOT:
             pop     ebx
             add     ebx,_GLOBAL_OFFSET_TABLE_+$$-.get_GOT wrt ..gotpc

             ; the function body comes here

             mov     ebx,[ebp-4]
             mov     esp,ebp
             pop     ebp
             ret

   (For BSD, again, the symbol `_GLOBAL_OFFSET_TABLE' requires a second
leading underscore.)

   The first two lines of this function are simply the standard C
prologue to set up a stack frame, and the last three lines are standard
C function epilogue. The third line, and the fourth to last line, save
and restore the `EBX' register, because PIC shared libraries use this
register to store the address of the GOT.

   The interesting bit is the `CALL' instruction and the following two
lines. The `CALL' and `POP' combination obtains the address of the
label `.get_GOT', without having to know in advance where the program
was loaded (since the `CALL' instruction is encoded relative to the
current position). The `ADD' instruction makes use of one of the
special PIC relocation types: GOTPC relocation. With the `WRT ..gotpc'
qualifier specified, the symbol referenced (here
`_GLOBAL_OFFSET_TABLE_', the special symbol assigned to the GOT) is
given as an offset from the beginning of the section. (Actually, `ELF'
encodes it as the offset from the operand field of the `ADD'
instruction, but NASM simplifies this deliberately, so you do things the
same way for both `ELF' and `BSD'.) So the instruction then _adds_ the
beginning of the section, to get the real address of the GOT, and
subtracts the value of `.get_GOT' which it knows is in `EBX'.
Therefore, by the time that instruction has finished, `EBX' contains
the address of the GOT.

   If you didn't follow that, don't worry: it's never necessary to
obtain the address of the GOT by any other means, so you can put those
three instructions into a macro and safely ignore them:

     %macro  get_GOT 0

             call    %%getgot
       %%getgot:
             pop     ebx
             add     ebx,_GLOBAL_OFFSET_TABLE_+$$-%%getgot wrt ..gotpc

     %endmacro


File: nasm.info,  Node: Section 9.2.2,  Next: Section 9.2.3,  Prev: Section 9.2.1,  Up: Section 9.2

9.2.2. Finding Your Local Data Items
------------------------------------

Having got the GOT, you can then use it to obtain the addresses of your
data items. Most variables will reside in the sections you have
declared; they can be accessed using the `..gotoff' special `WRT' type.
The way this works is like this:

             lea     eax,[ebx+myvar wrt ..gotoff]

   The expression `myvar wrt ..gotoff' is calculated, when the shared
library is linked, to be the offset to the local variable `myvar' from
the beginning of the GOT. Therefore, adding it to `EBX' as above will
place the real address of `myvar' in `EAX'.

   If you declare variables as `GLOBAL' without specifying a size for
them, they are shared between code modules in the library, but do not
get exported from the library to the program that loaded it. They will
still be in your ordinary data and BSS sections, so you can access them
in the same way as local variables, using the above `..gotoff'
mechanism.

   Note that due to a peculiarity of the way BSD `a.out' format handles
this relocation type, there must be at least one non-local symbol in the
same section as the address you're trying to access.


File: nasm.info,  Node: Section 9.2.3,  Next: Section 9.2.4,  Prev: Section 9.2.2,  Up: Section 9.2

9.2.3. Finding External and Common Data Items
---------------------------------------------

If your library needs to get at an external variable (external to the
_library_, not just to one of the modules within it), you must use the
`..got' type to get at it. The `..got' type, instead of giving you the
offset from the GOT base to the variable, gives you the offset from the
GOT base to a GOT _entry_ containing the address of the variable.  The
linker will set up this GOT entry when it builds the library, and the
dynamic linker will place the correct address in it at load time. So to
obtain the address of an external variable `extvar' in `EAX', you would
code

             mov     eax,[ebx+extvar wrt ..got]

   This loads the address of `extvar' out of an entry in the GOT. The
linker, when it builds the shared library, collects together every
relocation of type `..got', and builds the GOT so as to ensure it has
every necessary entry present.

   Common variables must also be accessed in this way.


File: nasm.info,  Node: Section 9.2.4,  Next: Section 9.2.5,  Prev: Section 9.2.3,  Up: Section 9.2

9.2.4. Exporting Symbols to the Library User
--------------------------------------------

If you want to export symbols to the user of the library, you have to
declare whether they are functions or data, and if they are data, you
have to give the size of the data item. This is because the dynamic
linker has to build procedure linkage table entries for any exported
functions, and also moves exported data items away from the library's
data section in which they were declared.

   So to export a function to users of the library, you must use

     global  func:function           ; declare it as a function

     func:   push    ebp

             ; etc.

   And to export a data item such as an array, you would have to code

     global  array:data array.end-array      ; give the size too

     array:  resd    128
     .end:

   Be careful: If you export a variable to the library user, by
declaring it as `GLOBAL' and supplying a size, the variable will end up
living in the data section of the main program, rather than in your
library's data section, where you declared it. So you will have to
access your own global variable with the `..got' mechanism rather than
`..gotoff', as if it were external (which, effectively, it has become).

   Equally, if you need to store the address of an exported global in
one of your data sections, you can't do it by means of the standard
sort of code:

     dataptr:        dd      global_data_item        ; WRONG

   NASM will interpret this code as an ordinary relocation, in which
`global_data_item' is merely an offset from the beginning of the
`.data' section (or whatever); so this reference will end up pointing
at your data section instead of at the exported global which resides
elsewhere.

   Instead of the above code, then, you must write

     dataptr:        dd      global_data_item wrt ..sym

   which makes use of the special `WRT' type `..sym' to instruct NASM
to search the symbol table for a particular symbol at that address,
rather than just relocating by section base.

   Either method will work for functions: referring to one of your
functions by means of

     funcptr:        dd      my_function

   will give the user the address of the code you wrote, whereas

     funcptr:        dd      my_function wrt .sym

   will give the address of the procedure linkage table for the
function, which is where the calling program will _believe_ the
function lives.  Either address is a valid way to call the function.


File: nasm.info,  Node: Section 9.2.5,  Next: Section 9.2.6,  Prev: Section 9.2.4,  Up: Section 9.2

9.2.5. Calling Procedures Outside the Library
---------------------------------------------

Calling procedures outside your shared library has to be done by means
of a _procedure linkage table_, or PLT. The PLT is placed at a known
offset from where the library is loaded, so the library code can make
calls to the PLT in a position-independent way. Within the PLT there is
code to jump to offsets contained in the GOT, so function calls to
other shared libraries or to routines in the main program can be
transparently passed off to their real destinations.

   To call an external routine, you must use another special PIC
relocation type, `WRT ..plt'. This is much easier than the GOT-based
ones: you simply replace calls such as `CALL printf' with the
PLT-relative version `CALL printf WRT ..plt'.


File: nasm.info,  Node: Section 9.2.6,  Next: Chapter 10,  Prev: Section 9.2.5,  Up: Section 9.2

9.2.6. Generating the Library File
----------------------------------

Having written some code modules and assembled them to `.o' files, you
then generate your shared library with a command such as

     ld -shared -o library.so module1.o module2.o       # for ELF
     ld -Bshareable -o library.so module1.o module2.o   # for BSD

   For ELF, if your shared library is going to reside in system
directories such as `/usr/lib' or `/lib', it is usually worth using the
`-soname' flag to the linker, to store the final library file name,
with a version number, into the library:

     ld -shared -soname library.so.1 -o library.so.1.2 *.o

   You would then copy `library.so.1.2' into the library directory, and
create `library.so.1' as a symbolic link to it.


File: nasm.info,  Node: Chapter 10,  Next: Section 10.1,  Prev: Section 9.2.6,  Up: Top

Chapter 10: Mixing 16 and 32 Bit Code
*************************************

This chapter tries to cover some of the issues, largely related to
unusual forms of addressing and jump instructions, encountered when
writing operating system code such as protected-mode initialisation
routines, which require code that operates in mixed segment sizes, such
as code in a 16-bit segment trying to modify data in a 32-bit one, or
jumps between different- size segments.

* Menu:

* Section 10.1:: Mixed-Size Jumps
* Section 10.2:: Addressing Between Different-Size Segments
* Section 10.3:: Other Mixed-Size Instructions


File: nasm.info,  Node: Section 10.1,  Next: Section 10.2,  Prev: Chapter 10,  Up: Chapter 10

10.1. Mixed-Size Jumps
======================

The most common form of mixed-size instruction is the one used when
writing a 32-bit OS: having done your setup in 16-bit mode, such as
loading the kernel, you then have to boot it by switching into
protected mode and jumping to the 32-bit kernel start address. In a
fully 32-bit OS, this tends to be the _only_ mixed-size instruction you
need, since everything before it can be done in pure 16-bit code, and
everything after it can be pure 32-bit.

   This jump must specify a 48-bit far address, since the target
segment is a 32-bit one. However, it must be assembled in a 16-bit
segment, so just coding, for example,

             jmp     0x1234:0x56789ABC       ; wrong!

   will not work, since the offset part of the address will be
truncated to `0x9ABC' and the jump will be an ordinary 16-bit far one.

   The Linux kernel setup code gets round the inability of `as86' to
generate the required instruction by coding it manually, using `DB'
instructions. NASM can go one better than that, by actually generating
the right instruction itself. Here's how to do it right:

             jmp     dword 0x1234:0x56789ABC         ; right

   The `DWORD' prefix (strictly speaking, it should come _after_ the
colon, since it is declaring the _offset_ field to be a doubleword; but
NASM will accept either form, since both are unambiguous) forces the
offset part to be treated as far, in the assumption that you are
deliberately writing a jump from a 16-bit segment to a 32-bit one.

   You can do the reverse operation, jumping from a 32-bit segment to a
16-bit one, by means of the `WORD' prefix:

             jmp     word 0x8765:0x4321      ; 32 to 16 bit

   If the `WORD' prefix is specified in 16-bit mode, or the `DWORD'
prefix in 32-bit mode, they will be ignored, since each is explicitly
forcing NASM into a mode it was in anyway.


File: nasm.info,  Node: Section 10.2,  Next: Section 10.3,  Prev: Section 10.1,  Up: Chapter 10

10.2. Addressing Between Different-Size Segments
================================================

If your OS is mixed 16 and 32-bit, or if you are writing a DOS extender,
you are likely to have to deal with some 16-bit segments and some 32-bit
ones. At some point, you will probably end up writing code in a 16-bit
segment which has to access data in a 32-bit segment, or vice versa.

   If the data you are trying to access in a 32-bit segment lies within
the first 64K of the segment, you may be able to get away with using an
ordinary 16-bit addressing operation for the purpose; but sooner or
later, you will want to do 32-bit addressing from 16-bit mode.

   The easiest way to do this is to make sure you use a register for the
address, since any effective address containing a 32-bit register is
forced to be a 32-bit address. So you can do

             mov     eax,offset_into_32_bit_segment_specified_by_fs
             mov     dword [fs:eax],0x11223344

   This is fine, but slightly cumbersome (since it wastes an
instruction and a register) if you already know the precise offset you
are aiming at. The x86 architecture does allow 32-bit effective
addresses to specify nothing but a 4-byte offset, so why shouldn't NASM
be able to generate the best instruction for the purpose?

   It can. As in *Note Section 10.1::, you need only prefix the address
with the `DWORD' keyword, and it will be forced to be a 32-bit address:

             mov     dword [fs:dword my_offset],0x11223344

   Also as in *Note Section 10.1::, NASM is not fussy about whether the
`DWORD' prefix comes before or after the segment override, so arguably
a nicer-looking way to code the above instruction is

             mov     dword [dword fs:my_offset],0x11223344

   Don't confuse the `DWORD' prefix _outside_ the square brackets,
which controls the size of the data stored at the address, with the one
`inside' the square brackets which controls the length of the address
itself. The two can quite easily be different:

             mov     word [dword 0x12345678],0x9ABC

   This moves 16 bits of data to an address specified by a 32-bit
offset.

   You can also specify `WORD' or `DWORD' prefixes along with the `FAR'
prefix to indirect far jumps or calls. For example:

             call    dword far [fs:word 0x4321]

   This instruction contains an address specified by a 16-bit offset;
it loads a 48-bit far pointer from that (16-bit segment and 32-bit
offset), and calls that address.


File: nasm.info,  Node: Section 10.3,  Next: Chapter 11,  Prev: Section 10.2,  Up: Chapter 10

10.3. Other Mixed-Size Instructions
===================================

The other way you might want to access data might be using the string
instructions (`LODSx', `STOSx' and so on) or the `XLATB' instruction.
These instructions, since they take no parameters, might seem to have
no easy way to make them perform 32-bit addressing when assembled in a
16-bit segment.

   This is the purpose of NASM's `a16', `a32' and `a64' prefixes. If
you are coding `LODSB' in a 16-bit segment but it is supposed to be
accessing a string in a 32-bit segment, you should load the desired
address into `ESI' and then code

             a32     lodsb

   The prefix forces the addressing size to 32 bits, meaning that
`LODSB' loads from `[DS:ESI]' instead of `[DS:SI]'. To access a string
in a 16-bit segment when coding in a 32-bit one, the corresponding `a16'
prefix can be used.

   The `a16', `a32' and `a64' prefixes can be applied to any
instruction in NASM's instruction table, but most of them can generate
all the useful forms without them. The prefixes are necessary only for
instructions with implicit addressing: `CMPSx', `SCASx', `LODSx',
`STOSx', `MOVSx', `INSx', `OUTSx', and `XLATB'. Also, the various push
and pop instructions (`PUSHA' and `POPF' as well as the more usual
`PUSH' and `POP') can accept `a16', `a32' or `a64' prefixes to force a
particular one of `SP', `ESP' or `RSP' to be used as a stack pointer,
in case the stack segment in use is a different size from the code
segment.

   `PUSH' and `POP', when applied to segment registers in 32-bit mode,
also have the slightly odd behaviour that they push and pop 4 bytes at
a time, of which the top two are ignored and the bottom two give the
value of the segment register being manipulated. To force the 16-bit
behaviour of segment-register push and pop instructions, you can use the
operand-size prefix `o16':

             o16 push    ss
             o16 push    ds

   This code saves a doubleword of stack space by fitting two segment
registers into the space which would normally be consumed by pushing
one.

   (You can also use the `o32' prefix to force the 32-bit behaviour when
in 16-bit mode, but this seems less useful.)


File: nasm.info,  Node: Chapter 11,  Next: Section 11.1,  Prev: Section 10.3,  Up: Top

Chapter 11: Writing 64-bit Code (Unix, Win64)
*********************************************

This chapter attempts to cover some of the common issues involved when
writing 64-bit code, to run under Win64 or Unix. It covers how to write
assembly code to interface with 64-bit C routines, and how to write
position-independent code for shared libraries.

   All 64-bit code uses a flat memory model, since segmentation is not
available in 64-bit mode. The one exception is the `FS' and `GS'
registers, which still add their bases.

   Position independence in 64-bit mode is significantly simpler, since
the processor supports `RIP'-relative addressing directly; see the
`REL' keyword (*Note Section 3.3::). On most 64-bit platforms, it is
probably desirable to make that the default, using the directive
`DEFAULT REL' (*Note Section 6.2::).

   64-bit programming is relatively similar to 32-bit programming, but
of course pointers are 64 bits long; additionally, all existing
platforms pass arguments in registers rather than on the stack.
Furthermore, 64-bit platforms use SSE2 by default for floating point.
Please see the ABI documentation for your platform.

   64-bit platforms differ in the sizes of the fundamental datatypes,
not just from 32-bit platforms but from each other. If a specific size
data type is desired, it is probably best to use the types defined in
the Standard C header `<inttypes.h>'.

   In 64-bit mode, the default instruction size is still 32 bits. When
loading a value into a 32-bit register (but not an 8- or 16-bit
register), the upper 32 bits of the corresponding 64-bit register are
set to zero.

* Menu:

* Section 11.1:: Register Names in 64-bit Mode
* Section 11.2:: Immediates and Displacements in 64-bit Mode
* Section 11.3:: Interfacing to 64-bit C Programs (Unix)
* Section 11.4:: Interfacing to 64-bit C Programs (Win64)


File: nasm.info,  Node: Section 11.1,  Next: Section 11.2,  Prev: Chapter 11,  Up: Chapter 11

11.1. Register Names in 64-bit Mode
===================================

NASM uses the following names for general-purpose registers in 64-bit
mode, for 8-, 16-, 32- and 64-bit references, respecitively:

          AL/AH, CL/CH, DL/DH, BL/BH, SPL, BPL, SIL, DIL, R8B-R15B
          AX, CX, DX, BX, SP, BP, SI, DI, R8W-R15W
          EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI, R8D-R15D
          RAX, RCX, RDX, RBX, RSP, RBP, RSI, RDI, R8-R15

   This is consistent with the AMD documentation and most other
assemblers.  The Intel documentation, however, uses the names
`R8L-R15L' for 8-bit references to the higher registers. It is possible
to use those names by definiting them as macros; similarly, if one
wants to use numeric names for the low 8 registers, define them as
macros. The standard macro package `altreg' (see *Note Section 5.1::)
can be used for this purpose.


File: nasm.info,  Node: Section 11.2,  Next: Section 11.3,  Prev: Section 11.1,  Up: Chapter 11

11.2. Immediates and Displacements in 64-bit Mode
=================================================

In 64-bit mode, immediates and displacements are generally only 32 bits
wide. NASM will therefore truncate most displacements and immediates to
32 bits.

   The only instruction which takes a full 64-bit immediate is:

          MOV reg64,imm64

   NASM will produce this instruction whenever the programmer uses `MOV'
with an immediate into a 64-bit register. If this is not desirable,
simply specify the equivalent 32-bit register, which will be
automatically zero- extended by the processor, or specify the immediate
as `DWORD':

          mov rax,foo             ; 64-bit immediate
          mov rax,qword foo       ; (identical)
          mov eax,foo             ; 32-bit immediate, zero-extended
          mov rax,dword foo       ; 32-bit immediate, sign-extended

   The length of these instructions are 10, 5 and 7 bytes, respectively.

   The only instructions which take a full 64-bit _displacement_ is
loading or storing, using `MOV', `AL', `AX', `EAX' or `RAX' (but no
other registers) to an absolute 64-bit address. Since this is a
relatively rarely used instruction (64-bit code generally uses relative
addressing), the programmer has to explicitly declare the displacement
size as `QWORD':

          default abs

          mov eax,[foo]           ; 32-bit absolute disp, sign-extended
          mov eax,[a32 foo]       ; 32-bit absolute disp, zero-extended
          mov eax,[qword foo]     ; 64-bit absolute disp

          default rel

          mov eax,[foo]           ; 32-bit relative disp
          mov eax,[a32 foo]       ; d:o, address truncated to 32 bits(!)
          mov eax,[qword foo]     ; error
          mov eax,[abs qword foo] ; 64-bit absolute disp

   A sign-extended absolute displacement can access from -2 GB to +2
GB; a zero-extended absolute displacement can access from 0 to 4 GB.


File: nasm.info,  Node: Section 11.3,  Next: Section 11.4,  Prev: Section 11.2,  Up: Chapter 11

11.3. Interfacing to 64-bit C Programs (Unix)
=============================================

On Unix, the 64-bit ABI is defined by the document:

   `http://www.x86-64.org/documentation/abi.pdf'

   Although written for AT&T-syntax assembly, the concepts apply
equally well for NASM-style assembly. What follows is a simplified
summary.

   The first six integer arguments (from the left) are passed in `RDI',
`RSI', `RDX', `RCX', `R8', and `R9', in that order. Additional integer
arguments are passed on the stack. These registers, plus `RAX', `R10'
and `R11' are destroyed by function calls, and thus are available for
use by the function without saving.

   Integer return values are passed in `RAX' and `RDX', in that order.

   Floating point is done using SSE registers, except for `long double'.
Floating-point arguments are passed in `XMM0' to `XMM7'; return is
`XMM0' and `XMM1'. `long double' are passed on the stack, and returned
in `ST0' and `ST1'.

   All SSE and x87 registers are destroyed by function calls.

   On 64-bit Unix, `long' is 64 bits.

   Integer and SSE register arguments are counted separately, so for
the case of

          void foo(long a, double b, int c)

   `a' is passed in `RDI', `b' in `XMM0', and `c' in `ESI'.


File: nasm.info,  Node: Section 11.4,  Next: Chapter 12,  Prev: Section 11.3,  Up: Chapter 11

11.4. Interfacing to 64-bit C Programs (Win64)
==============================================

The Win64 ABI is described at:

   `http://msdn2.microsoft.com/en-gb/library/ms794533.aspx'

   What follows is a simplified summary.

   The first four integer arguments are passed in `RCX', `RDX', `R8'
and `R9', in that order. Additional integer arguments are passed on the
stack. These registers, plus `RAX', `R10' and `R11' are destroyed by
function calls, and thus are available for use by the function without
saving.

   Integer return values are passed in `RAX' only.

   Floating point is done using SSE registers, except for `long double'.
Floating-point arguments are passed in `XMM0' to `XMM3'; return is
`XMM0' only.

   On Win64, `long' is 32 bits; `long long' or `_int64' is 64 bits.

   Integer and SSE register arguments are counted together, so for the
case of

          void foo(long long a, double b, int c)

   `a' is passed in `RCX', `b' in `XMM1', and `c' in `R8D'.


File: nasm.info,  Node: Chapter 12,  Next: Section 12.1,  Prev: Section 11.4,  Up: Top

Chapter 12: Troubleshooting
***************************

This chapter describes some of the common problems that users have been
known to encounter with NASM, and answers them. It also gives
instructions for reporting bugs in NASM if you find a difficulty that
isn't listed here.

* Menu:

* Section 12.1:: Common Problems
* Section 12.2:: Bugs


File: nasm.info,  Node: Section 12.1,  Next: Section 12.1.1,  Prev: Chapter 12,  Up: Chapter 12

12.1. Common Problems
=====================

* Menu:

* Section 12.1.1:: NASM Generates Inefficient Code
* Section 12.1.2:: My Jumps are Out of Range
* Section 12.1.3:: `ORG' Doesn't Work
* Section 12.1.4:: `TIMES' Doesn't Work


File: nasm.info,  Node: Section 12.1.1,  Next: Section 12.1.2,  Prev: Section 12.1,  Up: Section 12.1

12.1.1. NASM Generates Inefficient Code
---------------------------------------

We sometimes get `bug' reports about NASM generating inefficient, or
even `wrong', code on instructions such as `ADD ESP,8'. This is a
deliberate design feature, connected to predictability of output: NASM,
on seeing `ADD ESP,8', will generate the form of the instruction which
leaves room for a 32-bit offset. You need to code `ADD ESP,BYTE 8' if
you want the space-efficient form of the instruction. This isn't a bug,
it's user error: if you prefer to have NASM produce the more efficient
code automatically enable optimization with the `-O' option (see *Note
Section 2.1.22::).


File: nasm.info,  Node: Section 12.1.2,  Next: Section 12.1.3,  Prev: Section 12.1.1,  Up: Section 12.1

12.1.2. My Jumps are Out of Range
---------------------------------

Similarly, people complain that when they issue conditional jumps (which
are `SHORT' by default) that try to jump too far, NASM reports `short
jump out of range' instead of making the jumps longer.

   This, again, is partly a predictability issue, but in fact has a more
practical reason as well. NASM has no means of being told what type of
processor the code it is generating will be run on; so it cannot decide
for itself that it should generate `Jcc NEAR' type instructions, because
it doesn't know that it's working for a 386 or above. Alternatively, it
could replace the out-of-range short `JNE' instruction with a very
short `JE' instruction that jumps over a `JMP NEAR'; this is a sensible
solution for processors below a 386, but hardly efficient on processors
which have good branch prediction _and_ could have used `JNE NEAR'
instead. So, once again, it's up to the user, not the assembler, to
decide what instructions should be generated. See *Note Section
2.1.22::.


File: nasm.info,  Node: Section 12.1.3,  Next: Section 12.1.4,  Prev: Section 12.1.2,  Up: Section 12.1

12.1.3. `ORG' Doesn't Work
--------------------------

People writing boot sector programs in the `bin' format often complain
that `ORG' doesn't work the way they'd like: in order to place the
`0xAA55' signature word at the end of a 512-byte boot sector, people
who are used to MASM tend to code

             ORG 0

             ; some boot sector code

             ORG 510
             DW 0xAA55

   This is not the intended use of the `ORG' directive in NASM, and will
not work. The correct way to solve this problem in NASM is to use the
`TIMES' directive, like this:

             ORG 0

             ; some boot sector code

             TIMES 510-($-$$) DB 0
             DW 0xAA55

   The `TIMES' directive will insert exactly enough zero bytes into the
output to move the assembly point up to 510. This method also has the
advantage that if you accidentally fill your boot sector too full, NASM
will catch the problem at assembly time and report it, so you won't end
up with a boot sector that you have to disassemble to find out what's
wrong with it.


File: nasm.info,  Node: Section 12.1.4,  Next: Section 12.2,  Prev: Section 12.1.3,  Up: Section 12.1

12.1.4. `TIMES' Doesn't Work
----------------------------

The other common problem with the above code is people who write the
`TIMES' line as

             TIMES 510-$ DB 0

   by reasoning that `$' should be a pure number, just like 510, so the
difference between them is also a pure number and can happily be fed to
`TIMES'.

   NASM is a _modular_ assembler: the various component parts are
designed to be easily separable for re-use, so they don't exchange
information unnecessarily. In consequence, the `bin' output format,
even though it has been told by the `ORG' directive that the `.text'
section should start at 0, does not pass that information back to the
expression evaluator. So from the evaluator's point of view, `$' isn't
a pure number: it's an offset from a section base. Therefore the
difference between `$' and 510 is also not a pure number, but involves
a section base. Values involving section bases cannot be passed as
arguments to `TIMES'.

   The solution, as in the previous section, is to code the `TIMES' line
in the form

             TIMES 510-($-$$) DB 0

   in which `$' and `$$' are offsets from the same section base, and so
their difference is a pure number. This will solve the problem and
generate sensible code.


File: nasm.info,  Node: Section 12.2,  Next: Appendix A,  Prev: Section 12.1.4,  Up: Chapter 12

12.2. Bugs
==========

We have never yet released a version of NASM with any _known_ bugs.
That doesn't usually stop there being plenty we didn't know about,
though.  Any that you find should be reported firstly via the
`bugtracker' at `https://sourceforge.net/projects/nasm/' (click on
"Bugs"), or if that fails then through one of the contacts in *Note
Section 1.2::.

   Please read *Note Section 2.2:: first, and don't report the bug if
it's listed in there as a deliberate feature. (If you think the feature
is badly thought out, feel free to send us reasons why you think it
should be changed, but don't just send us mail saying `This is a bug'
if the documentation says we did it on purpose.) Then read *Note
Section 12.1::, and don't bother reporting the bug if it's listed there.

   If you do report a bug, _please_ give us all of the following
information:

   * What operating system you're running NASM under. DOS, Linux,
     NetBSD, Win16, Win32, VMS (I'd be impressed), whatever.

   * If you're running NASM under DOS or Win32, tell us whether you've
     compiled your own executable from the DOS source archive, or
     whether you were using the standard distribution binaries out of
     the archive. If you were using a locally built executable, try to
     reproduce the problem using one of the standard binaries, as this
     will make it easier for us to reproduce your problem prior to
     fixing it.

   * Which version of NASM you're using, and exactly how you invoked
     it. Give us the precise command line, and the contents of the
     `NASMENV' environment variable if any.

   * Which versions of any supplementary programs you're using, and how
     you invoked them. If the problem only becomes visible at link
     time, tell us what linker you're using, what version of it you've
     got, and the exact linker command line. If the problem involves
     linking against object files generated by a compiler, tell us what
     compiler, what version, and what command line or options you used.
     (If you're compiling in an IDE, please try to reproduce the
     problem with the command-line version of the compiler.)

   * If at all possible, send us a NASM source file which exhibits the
     problem.  If this causes copyright problems (e.g. you can only
     reproduce the bug in restricted-distribution code) then bear in
     mind the following two points: firstly, we guarantee that any
     source code sent to us for the purposes of debugging NASM will be
     used _only_ for the purposes of debugging NASM, and that we will
     delete all our copies of it as soon as we have found and fixed the
     bug or bugs in question; and secondly, we would prefer _not_ to be
     mailed large chunks of code anyway. The smaller the file, the
     better.  A three-line sample file that does nothing useful
     _except_ demonstrate the problem is much easier to work with than
     a fully fledged ten-thousand- line program. (Of course, some
     errors _do_ only crop up in large files, so this may not be
     possible.)

   * A description of what the problem actually _is_. `It doesn't work'
     is _not_ a helpful description! Please describe exactly what is
     happening that shouldn't be, or what isn't happening that should.
     Examples might be: `NASM generates an error message saying Line 3
     for an error that's actually on Line 5'; `NASM generates an error
     message that I believe it shouldn't be generating at all'; `NASM
     fails to generate an error message that I believe it _should_ be
     generating'; `the object file produced from this source code
     crashes my linker'; `the ninth byte of the output file is 66 and I
     think it should be 77 instead'.

   * If you believe the output file from NASM to be faulty, send it to
     us. That allows us to determine whether our own copy of NASM
     generates the same file, or whether the problem is related to
     portability issues between our development platforms and yours. We
     can handle binary files mailed to us as MIME attachments,
     uuencoded, and even BinHex. Alternatively, we may be able to
     provide an FTP site you can upload the suspect files to; but
     mailing them is easier for us.

   * Any other information or data files that might be helpful. If, for
     example, the problem involves NASM failing to generate an object
     file while TASM can generate an equivalent file without trouble,
     then send us _both_ object files, so we can see what TASM is doing
     differently from us.


File: nasm.info,  Node: Appendix A,  Next: Section A.1,  Prev: Section 12.2,  Up: Top

Appendix A: Ndisasm
*******************

The Netwide Disassembler, NDISASM

* Menu:

* Section A.1:: Introduction
* Section A.2:: Getting Started: Installation
* Section A.3:: Running NDISASM
* Section A.4:: Bugs and Improvements


File: nasm.info,  Node: Section A.1,  Next: Section A.2,  Prev: Appendix A,  Up: Appendix A

A.1. Introduction
=================

The Netwide Disassembler is a small companion program to the Netwide
Assembler, NASM. It seemed a shame to have an x86 assembler, complete
with a full instruction table, and not make as much use of it as
possible, so here's a disassembler which shares the instruction table
(and some other bits of code) with NASM.

   The Netwide Disassembler does nothing except to produce
disassemblies of _binary_ source files. NDISASM does not have any
understanding of object file formats, like `objdump', and it will not
understand `DOS .EXE' files like `debug' will. It just disassembles.


File: nasm.info,  Node: Section A.2,  Next: Section A.3,  Prev: Section A.1,  Up: Appendix A

A.2. Getting Started: Installation
==================================

See *Note Section 1.3:: for installation instructions. NDISASM, like
NASM, has a `man page' which you may want to put somewhere useful, if
you are on a Unix system.


File: nasm.info,  Node: Section A.3,  Next: Section A.3.1,  Prev: Section A.2,  Up: Appendix A

A.3. Running NDISASM
====================

To disassemble a file, you will typically use a command of the form

            ndisasm -b {16|32|64} filename

   NDISASM can disassemble 16-, 32- or 64-bit code equally easily,
provided of course that you remember to specify which it is to work
with. If no `-b' switch is present, NDISASM works in 16-bit mode by
default. The `-u' switch (for USE32) also invokes 32-bit mode.

   Two more command line options are `-r' which reports the version
number of NDISASM you are running, and `-h' which gives a short summary
of command line options.

* Menu:

* Section A.3.1:: COM Files: Specifying an Origin
* Section A.3.2:: Code Following Data: Synchronisation
* Section A.3.3:: Mixed Code and Data: Automatic (Intelligent) Synchronisation
* Section A.3.4:: Other Options


File: nasm.info,  Node: Section A.3.1,  Next: Section A.3.2,  Prev: Section A.3,  Up: Section A.3

A.3.1. COM Files: Specifying an Origin
--------------------------------------

To disassemble a `DOS .COM' file correctly, a disassembler must assume
that the first instruction in the file is loaded at address `0x100',
rather than at zero. NDISASM, which assumes by default that any file you
give it is loaded at zero, will therefore need to be informed of this.

   The `-o' option allows you to declare a different origin for the file
you are disassembling. Its argument may be expressed in any of the NASM
numeric formats: decimal by default, if it begins with ``$'' or ``0x''
or ends in ``H'' it's `hex', if it ends in ``Q'' it's `octal', and if
it ends in ``B'' it's `binary'.

   Hence, to disassemble a `.COM' file:

            ndisasm -o100h filename.com

   will do the trick.


File: nasm.info,  Node: Section A.3.2,  Next: Section A.3.3,  Prev: Section A.3.1,  Up: Section A.3

A.3.2. Code Following Data: Synchronisation
-------------------------------------------

Suppose you are disassembling a file which contains some data which
isn't machine code, and _then_ contains some machine code. NDISASM will
faithfully plough through the data section, producing machine
instructions wherever it can (although most of them will look bizarre,
and some may have unusual prefixes, e.g. ``FS OR AX,0x240A''), and
generating `DB' instructions ever so often if it's totally stumped.
Then it will reach the code section.

   Supposing NDISASM has just finished generating a strange machine
instruction from part of the data section, and its file position is now
one byte _before_ the beginning of the code section. It's entirely
possible that another spurious instruction will get generated, starting
with the final byte of the data section, and then the correct first
instruction in the code section will not be seen because the starting
point skipped over it. This isn't really ideal.

   To avoid this, you can specify a ``synchronisation'' point, or indeed
as many synchronisation points as you like (although NDISASM can only
handle 2147483647 sync points internally). The definition of a sync
point is this: NDISASM guarantees to hit sync points exactly during
disassembly.  If it is thinking about generating an instruction which
would cause it to jump over a sync point, it will discard that
instruction and output a ``db'' instead. So it _will_ start disassembly
exactly from the sync point, and so you _will_ see all the instructions
in your code section.

   Sync points are specified using the `-s' option: they are measured in
terms of the program origin, not the file position. So if you want to
synchronize after 32 bytes of a `.COM' file, you would have to do

            ndisasm -o100h -s120h file.com

   rather than

            ndisasm -o100h -s20h file.com

   As stated above, you can specify multiple sync markers if you need
to, just by repeating the `-s' option.


File: nasm.info,  Node: Section A.3.3,  Next: Section A.3.4,  Prev: Section A.3.2,  Up: Section A.3

A.3.3. Mixed Code and Data: Automatic (Intelligent) Synchronisation
-------------------------------------------------------------------

Suppose you are disassembling the boot sector of a `DOS' floppy (maybe
it has a virus, and you need to understand the virus so that you know
what kinds of damage it might have done you). Typically, this will
contain a `JMP' instruction, then some data, then the rest of the code.
So there is a very good chance of NDISASM being _misaligned_ when the
data ends and the code begins. Hence a sync point is needed.

   On the other hand, why should you have to specify the sync point
manually?  What you'd do in order to find where the sync point would
be, surely, would be to read the `JMP' instruction, and then to use its
target address as a sync point. So can NDISASM do that for you?

   The answer, of course, is yes: using either of the synonymous
switches `-a' (for automatic sync) or `-i' (for intelligent sync) will
enable `auto-sync' mode. Auto-sync mode automatically generates a sync
point for any forward-referring PC-relative jump or call instruction
that NDISASM encounters. (Since NDISASM is one-pass, if it encounters a
PC- relative jump whose target has already been processed, there isn't
much it can do about it...)

   Only PC-relative jumps are processed, since an absolute jump is
either through a register (in which case NDISASM doesn't know what the
register contains) or involves a segment address (in which case the
target code isn't in the same segment that NDISASM is working in, and
so the sync point can't be placed anywhere useful).

   For some kinds of file, this mechanism will automatically put sync
points in all the right places, and save you from having to place any
sync points manually. However, it should be stressed that auto-sync
mode is _not_ guaranteed to catch all the sync points, and you may
still have to place some manually.

   Auto-sync mode doesn't prevent you from declaring manual sync
points: it just adds automatically generated ones to the ones you
provide. It's perfectly feasible to specify `-i' _and_ some `-s'
options.

   Another caveat with auto-sync mode is that if, by some unpleasant
fluke, something in your data section should disassemble to a
PC-relative call or jump instruction, NDISASM may obediently place a
sync point in a totally random place, for example in the middle of one
of the instructions in your code section. So you may end up with a
wrong disassembly even if you use auto-sync. Again, there isn't much I
can do about this. If you have problems, you'll have to use manual sync
points, or use the `-k' option (documented below) to suppress
disassembly of the data area.


File: nasm.info,  Node: Section A.3.4,  Next: Section A.4,  Prev: Section A.3.3,  Up: Section A.3

A.3.4. Other Options
--------------------

The `-e' option skips a header on the file, by ignoring the first N
bytes. This means that the header is _not_ counted towards the
disassembly offset: if you give `-e10 -o10', disassembly will start at
byte 10 in the file, and this will be given offset 10, not 20.

   The `-k' option is provided with two comma-separated numeric
arguments, the first of which is an assembly offset and the second is a
number of bytes to skip. This _will_ count the skipped bytes towards
the assembly offset: its use is to suppress disassembly of a data
section which wouldn't contain anything you wanted to see anyway.


File: nasm.info,  Node: Section A.4,  Next: Appendix B,  Prev: Section A.3.4,  Up: Appendix A

A.4. Bugs and Improvements
==========================

There are no known bugs. However, any you find, with patches if
possible, should be sent to `nasm-bugs@lists.sourceforge.net', or to the
developer's site at `https://sourceforge.net/projects/nasm/' and we'll
try to fix them. Feel free to send contributions and new features as
well.


File: nasm.info,  Node: Appendix B,  Next: Section B.1,  Prev: Section A.4,  Up: Top

Appendix B: Instruction List
****************************

* Menu:

* Section B.1:: Introduction


File: nasm.info,  Node: Section B.1,  Next: Section B.1.1,  Prev: Appendix B,  Up: Appendix B

B.1. Introduction
=================

The following sections show the instructions which NASM currently
supports.  For each instruction, there is a separate entry for each
supported addressing mode. The third column shows the processor type in
which the instruction was introduced and, when appropriate, one or more
usage flags.

* Menu:

* Section B.1.1:: Special instructions...
* Section B.1.2:: Conventional instructions
* Section B.1.3:: Katmai Streaming SIMD instructions (SSE ---- a.k.a. KNI, XMM, MMX2)
* Section B.1.4:: Introduced in Deschutes but necessary for SSE support
* Section B.1.5:: XSAVE group (AVX and extended state)
* Section B.1.6:: Generic memory operations
* Section B.1.7:: New MMX instructions introduced in Katmai
* Section B.1.8:: AMD Enhanced 3DNow! (Athlon) instructions
* Section B.1.9:: Willamette SSE2 Cacheability Instructions
* Section B.1.10:: Willamette MMX instructions (SSE2 SIMD Integer Instructions)
* Section B.1.11:: Willamette Streaming SIMD instructions (SSE2)
* Section B.1.12:: Prescott New Instructions (SSE3)
* Section B.1.13:: VMX Instructions
* Section B.1.14:: Extended Page Tables VMX instructions
* Section B.1.15:: Tejas New Instructions (SSSE3)
* Section B.1.16:: AMD SSE4A
* Section B.1.17:: New instructions in Barcelona
* Section B.1.18:: Penryn New Instructions (SSE4.1)
* Section B.1.19:: Nehalem New Instructions (SSE4.2)
* Section B.1.20:: Intel SMX
* Section B.1.21:: Geode (Cyrix) 3DNow! additions
* Section B.1.22:: Intel new instructions in ???
* Section B.1.23:: Intel AES instructions
* Section B.1.24:: Intel AVX AES instructions
* Section B.1.25:: Intel AVX instructions
* Section B.1.26:: Intel Carry-Less Multiplication instructions (CLMUL)
* Section B.1.27:: Intel AVX Carry-Less Multiplication instructions (CLMUL)
* Section B.1.28:: Intel Fused Multiply-Add instructions (FMA)
* Section B.1.29:: VIA (Centaur) security instructions
* Section B.1.30:: AMD Lightweight Profiling (LWP) instructions
* Section B.1.31:: AMD XOP, FMA4 and CVT16 instructions (SSE5)
* Section B.1.32:: Systematic names for the hinting nop instructions


File: nasm.info,  Node: Section B.1.1,  Next: Section B.1.2,  Prev: Section B.1,  Up: Section B.1

B.1.1. Special instructions...
------------------------------

     DB
     DW
     DD
     DQ
     DT
     DO
     DY
     RESB             imm                      8086
     RESW
     RESD
     RESQ
     REST
     RESO
     RESY


File: nasm.info,  Node: Section B.1.2,  Next: Section B.1.3,  Prev: Section B.1.1,  Up: Section B.1

B.1.2. Conventional instructions
--------------------------------

     AAA                                       8086,NOLONG
     AAD                                       8086,NOLONG
     AAD              imm                      8086,NOLONG
     AAM                                       8086,NOLONG
     AAM              imm                      8086,NOLONG
     AAS                                       8086,NOLONG
     ADC              mem,reg8                 8086
     ADC              reg8,reg8                8086
     ADC              mem,reg16                8086
     ADC              reg16,reg16              8086
     ADC              mem,reg32                386
     ADC              reg32,reg32              386
     ADC              mem,reg64                X64
     ADC              reg64,reg64              X64
     ADC              reg8,mem                 8086
     ADC              reg8,reg8                8086
     ADC              reg16,mem                8086
     ADC              reg16,reg16              8086
     ADC              reg32,mem                386
     ADC              reg32,reg32              386
     ADC              reg64,mem                X64
     ADC              reg64,reg64              X64
     ADC              rm16,imm8                8086
     ADC              rm32,imm8                386
     ADC              rm64,imm8                X64
     ADC              reg_al,imm               8086
     ADC              reg_ax,sbyte16           8086
     ADC              reg_ax,imm               8086
     ADC              reg_eax,sbyte32          386
     ADC              reg_eax,imm              386
     ADC              reg_rax,sbyte64          X64
     ADC              reg_rax,imm              X64
     ADC              rm8,imm                  8086
     ADC              rm16,imm                 8086
     ADC              rm32,imm                 386
     ADC              rm64,imm                 X64
     ADC              mem,imm8                 8086
     ADC              mem,imm16                8086
     ADC              mem,imm32                386
     ADD              mem,reg8                 8086
     ADD              reg8,reg8                8086
     ADD              mem,reg16                8086
     ADD              reg16,reg16              8086
     ADD              mem,reg32                386
     ADD              reg32,reg32              386
     ADD              mem,reg64                X64
     ADD              reg64,reg64              X64
     ADD              reg8,mem                 8086
     ADD              reg8,reg8                8086
     ADD              reg16,mem                8086
     ADD              reg16,reg16              8086
     ADD              reg32,mem                386
     ADD              reg32,reg32              386
     ADD              reg64,mem                X64
     ADD              reg64,reg64              X64
     ADD              rm16,imm8                8086
     ADD              rm32,imm8                386
     ADD              rm64,imm8                X64
     ADD              reg_al,imm               8086
     ADD              reg_ax,sbyte16           8086
     ADD              reg_ax,imm               8086
     ADD              reg_eax,sbyte32          386
     ADD              reg_eax,imm              386
     ADD              reg_rax,sbyte64          X64
     ADD              reg_rax,imm              X64
     ADD              rm8,imm                  8086
     ADD              rm16,imm                 8086
     ADD              rm32,imm                 386
     ADD              rm64,imm                 X64
     ADD              mem,imm8                 8086
     ADD              mem,imm16                8086
     ADD              mem,imm32                386
     AND              mem,reg8                 8086
     AND              reg8,reg8                8086
     AND              mem,reg16                8086
     AND              reg16,reg16              8086
     AND              mem,reg32                386
     AND              reg32,reg32              386
     AND              mem,reg64                X64
     AND              reg64,reg64              X64
     AND              reg8,mem                 8086
     AND              reg8,reg8                8086
     AND              reg16,mem                8086
     AND              reg16,reg16              8086
     AND              reg32,mem                386
     AND              reg32,reg32              386
     AND              reg64,mem                X64
     AND              reg64,reg64              X64
     AND              rm16,imm8                8086
     AND              rm32,imm8                386
     AND              rm64,imm8                X64
     AND              reg_al,imm               8086
     AND              reg_ax,sbyte16           8086
     AND              reg_ax,imm               8086
     AND              reg_eax,sbyte32          386
     AND              reg_eax,imm              386
     AND              reg_rax,sbyte64          X64
     AND              reg_rax,imm              X64
     AND              rm8,imm                  8086
     AND              rm16,imm                 8086
     AND              rm32,imm                 386
     AND              rm64,imm                 X64
     AND              mem,imm8                 8086
     AND              mem,imm16                8086
     AND              mem,imm32                386
     ARPL             mem,reg16                286,PROT,NOLONG
     ARPL             reg16,reg16              286,PROT,NOLONG
     BB0_RESET                                 PENT,CYRIX,ND
     BB1_RESET                                 PENT,CYRIX,ND
     BOUND            reg16,mem                186,NOLONG
     BOUND            reg32,mem                386,NOLONG
     BSF              reg16,mem                386
     BSF              reg16,reg16              386
     BSF              reg32,mem                386
     BSF              reg32,reg32              386
     BSF              reg64,mem                X64
     BSF              reg64,reg64              X64
     BSR              reg16,mem                386
     BSR              reg16,reg16              386
     BSR              reg32,mem                386
     BSR              reg32,reg32              386
     BSR              reg64,mem                X64
     BSR              reg64,reg64              X64
     BSWAP            reg32                    486
     BSWAP            reg64                    X64
     BT               mem,reg16                386
     BT               reg16,reg16              386
     BT               mem,reg32                386
     BT               reg32,reg32              386
     BT               mem,reg64                X64
     BT               reg64,reg64              X64
     BT               rm16,imm                 386
     BT               rm32,imm                 386
     BT               rm64,imm                 X64
     BTC              mem,reg16                386
     BTC              reg16,reg16              386
     BTC              mem,reg32                386
     BTC              reg32,reg32              386
     BTC              mem,reg64                X64
     BTC              reg64,reg64              X64
     BTC              rm16,imm                 386
     BTC              rm32,imm                 386
     BTC              rm64,imm                 X64
     BTR              mem,reg16                386
     BTR              reg16,reg16              386
     BTR              mem,reg32                386
     BTR              reg32,reg32              386
     BTR              mem,reg64                X64
     BTR              reg64,reg64              X64
     BTR              rm16,imm                 386
     BTR              rm32,imm                 386
     BTR              rm64,imm                 X64
     BTS              mem,reg16                386
     BTS              reg16,reg16              386
     BTS              mem,reg32                386
     BTS              reg32,reg32              386
     BTS              mem,reg64                X64
     BTS              reg64,reg64              X64
     BTS              rm16,imm                 386
     BTS              rm32,imm                 386
     BTS              rm64,imm                 X64
     CALL             imm                      8086
     CALL             imm|near                 8086
     CALL             imm|far                  8086,ND,NOLONG
     CALL             imm16                    8086
     CALL             imm16|near               8086
     CALL             imm16|far                8086,ND,NOLONG
     CALL             imm32                    386
     CALL             imm32|near               386
     CALL             imm32|far                386,ND,NOLONG
     CALL             imm:imm                  8086,NOLONG
     CALL             imm16:imm                8086,NOLONG
     CALL             imm:imm16                8086,NOLONG
     CALL             imm32:imm                386,NOLONG
     CALL             imm:imm32                386,NOLONG
     CALL             mem|far                  8086,NOLONG
     CALL             mem|far                  X64
     CALL             mem16|far                8086
     CALL             mem32|far                386
     CALL             mem64|far                X64
     CALL             mem|near                 8086
     CALL             mem16|near               8086
     CALL             mem32|near               386,NOLONG
     CALL             mem64|near               X64
     CALL             reg16                    8086
     CALL             reg32                    386,NOLONG
     CALL             reg64                    X64
     CALL             mem                      8086
     CALL             mem16                    8086
     CALL             mem32                    386,NOLONG
     CALL             mem64                    X64
     CBW                                       8086
     CDQ                                       386
     CDQE                                      X64
     CLC                                       8086
     CLD                                       8086
     CLGI                                      X64,AMD
     CLI                                       8086
     CLTS                                      286,PRIV
     CMC                                       8086
     CMP              mem,reg8                 8086
     CMP              reg8,reg8                8086
     CMP              mem,reg16                8086
     CMP              reg16,reg16              8086
     CMP              mem,reg32                386
     CMP              reg32,reg32              386
     CMP              mem,reg64                X64
     CMP              reg64,reg64              X64
     CMP              reg8,mem                 8086
     CMP              reg8,reg8                8086
     CMP              reg16,mem                8086
     CMP              reg16,reg16              8086
     CMP              reg32,mem                386
     CMP              reg32,reg32              386
     CMP              reg64,mem                X64
     CMP              reg64,reg64              X64
     CMP              rm16,imm8                8086
     CMP              rm32,imm8                386
     CMP              rm64,imm8                X64
     CMP              reg_al,imm               8086
     CMP              reg_ax,sbyte16           8086
     CMP              reg_ax,imm               8086
     CMP              reg_eax,sbyte32          386
     CMP              reg_eax,imm              386
     CMP              reg_rax,sbyte64          X64
     CMP              reg_rax,imm              X64
     CMP              rm8,imm                  8086
     CMP              rm16,imm                 8086
     CMP              rm32,imm                 386
     CMP              rm64,imm                 X64
     CMP              mem,imm8                 8086
     CMP              mem,imm16                8086
     CMP              mem,imm32                386
     CMPSB                                     8086
     CMPSD                                     386
     CMPSQ                                     X64
     CMPSW                                     8086
     CMPXCHG          mem,reg8                 PENT
     CMPXCHG          reg8,reg8                PENT
     CMPXCHG          mem,reg16                PENT
     CMPXCHG          reg16,reg16              PENT
     CMPXCHG          mem,reg32                PENT
     CMPXCHG          reg32,reg32              PENT
     CMPXCHG          mem,reg64                X64
     CMPXCHG          reg64,reg64              X64
     CMPXCHG486       mem,reg8                 486,UNDOC,ND
     CMPXCHG486       reg8,reg8                486,UNDOC,ND
     CMPXCHG486       mem,reg16                486,UNDOC,ND
     CMPXCHG486       reg16,reg16              486,UNDOC,ND
     CMPXCHG486       mem,reg32                486,UNDOC,ND
     CMPXCHG486       reg32,reg32              486,UNDOC,ND
     CMPXCHG8B        mem                      PENT
     CMPXCHG16B       mem                      X64
     CPUID                                     PENT
     CPU_READ                                  PENT,CYRIX
     CPU_WRITE                                 PENT,CYRIX
     CQO                                       X64
     CWD                                       8086
     CWDE                                      386
     DAA                                       8086,NOLONG
     DAS                                       8086,NOLONG
     DEC              reg16                    8086,NOLONG
     DEC              reg32                    386,NOLONG
     DEC              rm8                      8086
     DEC              rm16                     8086
     DEC              rm32                     386
     DEC              rm64                     X64
     DIV              rm8                      8086
     DIV              rm16                     8086
     DIV              rm32                     386
     DIV              rm64                     X64
     DMINT                                     P6,CYRIX
     EMMS                                      PENT,MMX
     ENTER            imm,imm                  186
     EQU              imm                      8086
     EQU              imm:imm                  8086
     F2XM1                                     8086,FPU
     FABS                                      8086,FPU
     FADD             mem32                    8086,FPU
     FADD             mem64                    8086,FPU
     FADD             fpureg|to                8086,FPU
     FADD             fpureg                   8086,FPU
     FADD             fpureg,fpu0              8086,FPU
     FADD             fpu0,fpureg              8086,FPU
     FADD                                      8086,FPU,ND
     FADDP            fpureg                   8086,FPU
     FADDP            fpureg,fpu0              8086,FPU
     FADDP                                     8086,FPU,ND
     FBLD             mem80                    8086,FPU
     FBLD             mem                      8086,FPU
     FBSTP            mem80                    8086,FPU
     FBSTP            mem                      8086,FPU
     FCHS                                      8086,FPU
     FCLEX                                     8086,FPU
     FCMOVB           fpureg                   P6,FPU
     FCMOVB           fpu0,fpureg              P6,FPU
     FCMOVB                                    P6,FPU,ND
     FCMOVBE          fpureg                   P6,FPU
     FCMOVBE          fpu0,fpureg              P6,FPU
     FCMOVBE                                   P6,FPU,ND
     FCMOVE           fpureg                   P6,FPU
     FCMOVE           fpu0,fpureg              P6,FPU
     FCMOVE                                    P6,FPU,ND
     FCMOVNB          fpureg                   P6,FPU
     FCMOVNB          fpu0,fpureg              P6,FPU
     FCMOVNB                                   P6,FPU,ND
     FCMOVNBE         fpureg                   P6,FPU
     FCMOVNBE         fpu0,fpureg              P6,FPU
     FCMOVNBE                                  P6,FPU,ND
     FCMOVNE          fpureg                   P6,FPU
     FCMOVNE          fpu0,fpureg              P6,FPU
     FCMOVNE                                   P6,FPU,ND
     FCMOVNU          fpureg                   P6,FPU
     FCMOVNU          fpu0,fpureg              P6,FPU
     FCMOVNU                                   P6,FPU,ND
     FCMOVU           fpureg                   P6,FPU
     FCMOVU           fpu0,fpureg              P6,FPU
     FCMOVU                                    P6,FPU,ND
     FCOM             mem32                    8086,FPU
     FCOM             mem64                    8086,FPU
     FCOM             fpureg                   8086,FPU
     FCOM             fpu0,fpureg              8086,FPU
     FCOM                                      8086,FPU,ND
     FCOMI            fpureg                   P6,FPU
     FCOMI            fpu0,fpureg              P6,FPU
     FCOMI                                     P6,FPU,ND
     FCOMIP           fpureg                   P6,FPU
     FCOMIP           fpu0,fpureg              P6,FPU
     FCOMIP                                    P6,FPU,ND
     FCOMP            mem32                    8086,FPU
     FCOMP            mem64                    8086,FPU
     FCOMP            fpureg                   8086,FPU
     FCOMP            fpu0,fpureg              8086,FPU
     FCOMP                                     8086,FPU,ND
     FCOMPP                                    8086,FPU
     FCOS                                      386,FPU
     FDECSTP                                   8086,FPU
     FDISI                                     8086,FPU
     FDIV             mem32                    8086,FPU
     FDIV             mem64                    8086,FPU
     FDIV             fpureg|to                8086,FPU
     FDIV             fpureg                   8086,FPU
     FDIV             fpureg,fpu0              8086,FPU
     FDIV             fpu0,fpureg              8086,FPU
     FDIV                                      8086,FPU,ND
     FDIVP            fpureg                   8086,FPU
     FDIVP            fpureg,fpu0              8086,FPU
     FDIVP                                     8086,FPU,ND
     FDIVR            mem32                    8086,FPU
     FDIVR            mem64                    8086,FPU
     FDIVR            fpureg|to                8086,FPU
     FDIVR            fpureg,fpu0              8086,FPU
     FDIVR            fpureg                   8086,FPU
     FDIVR            fpu0,fpureg              8086,FPU
     FDIVR                                     8086,FPU,ND
     FDIVRP           fpureg                   8086,FPU
     FDIVRP           fpureg,fpu0              8086,FPU
     FDIVRP                                    8086,FPU,ND
     FEMMS                                     PENT,3DNOW
     FENI                                      8086,FPU
     FFREE            fpureg                   8086,FPU
     FFREE                                     8086,FPU
     FFREEP           fpureg                   286,FPU,UNDOC
     FFREEP                                    286,FPU,UNDOC
     FIADD            mem32                    8086,FPU
     FIADD            mem16                    8086,FPU
     FICOM            mem32                    8086,FPU
     FICOM            mem16                    8086,FPU
     FICOMP           mem32                    8086,FPU
     FICOMP           mem16                    8086,FPU
     FIDIV            mem32                    8086,FPU
     FIDIV            mem16                    8086,FPU
     FIDIVR           mem32                    8086,FPU
     FIDIVR           mem16                    8086,FPU
     FILD             mem32                    8086,FPU
     FILD             mem16                    8086,FPU
     FILD             mem64                    8086,FPU
     FIMUL            mem32                    8086,FPU
     FIMUL            mem16                    8086,FPU
     FINCSTP                                   8086,FPU
     FINIT                                     8086,FPU
     FIST             mem32                    8086,FPU
     FIST             mem16                    8086,FPU
     FISTP            mem32                    8086,FPU
     FISTP            mem16                    8086,FPU
     FISTP            mem64                    8086,FPU
     FISTTP           mem16                    PRESCOTT,FPU
     FISTTP           mem32                    PRESCOTT,FPU
     FISTTP           mem64                    PRESCOTT,FPU
     FISUB            mem32                    8086,FPU
     FISUB            mem16                    8086,FPU
     FISUBR           mem32                    8086,FPU
     FISUBR           mem16                    8086,FPU
     FLD              mem32                    8086,FPU
     FLD              mem64                    8086,FPU
     FLD              mem80                    8086,FPU
     FLD              fpureg                   8086,FPU
     FLD                                       8086,FPU,ND
     FLD1                                      8086,FPU
     FLDCW            mem                      8086,FPU,SW
     FLDENV           mem                      8086,FPU
     FLDL2E                                    8086,FPU
     FLDL2T                                    8086,FPU
     FLDLG2                                    8086,FPU
     FLDLN2                                    8086,FPU
     FLDPI                                     8086,FPU
     FLDZ                                      8086,FPU
     FMUL             mem32                    8086,FPU
     FMUL             mem64                    8086,FPU
     FMUL             fpureg|to                8086,FPU
     FMUL             fpureg,fpu0              8086,FPU
     FMUL             fpureg                   8086,FPU
     FMUL             fpu0,fpureg              8086,FPU
     FMUL                                      8086,FPU,ND
     FMULP            fpureg                   8086,FPU
     FMULP            fpureg,fpu0              8086,FPU
     FMULP                                     8086,FPU,ND
     FNCLEX                                    8086,FPU
     FNDISI                                    8086,FPU
     FNENI                                     8086,FPU
     FNINIT                                    8086,FPU
     FNOP                                      8086,FPU
     FNSAVE           mem                      8086,FPU
     FNSTCW           mem                      8086,FPU,SW
     FNSTENV          mem                      8086,FPU
     FNSTSW           mem                      8086,FPU,SW
     FNSTSW           reg_ax                   286,FPU
     FPATAN                                    8086,FPU
     FPREM                                     8086,FPU
     FPREM1                                    386,FPU
     FPTAN                                     8086,FPU
     FRNDINT                                   8086,FPU
     FRSTOR           mem                      8086,FPU
     FSAVE            mem                      8086,FPU
     FSCALE                                    8086,FPU
     FSETPM                                    286,FPU
     FSIN                                      386,FPU
     FSINCOS                                   386,FPU
     FSQRT                                     8086,FPU
     FST              mem32                    8086,FPU
     FST              mem64                    8086,FPU
     FST              fpureg                   8086,FPU
     FST                                       8086,FPU,ND
     FSTCW            mem                      8086,FPU,SW
     FSTENV           mem                      8086,FPU
     FSTP             mem32                    8086,FPU
     FSTP             mem64                    8086,FPU
     FSTP             mem80                    8086,FPU
     FSTP             fpureg                   8086,FPU
     FSTP                                      8086,FPU,ND
     FSTSW            mem                      8086,FPU,SW
     FSTSW            reg_ax                   286,FPU
     FSUB             mem32                    8086,FPU
     FSUB             mem64                    8086,FPU
     FSUB             fpureg|to                8086,FPU
     FSUB             fpureg,fpu0              8086,FPU
     FSUB             fpureg                   8086,FPU
     FSUB             fpu0,fpureg              8086,FPU
     FSUB                                      8086,FPU,ND
     FSUBP            fpureg                   8086,FPU
     FSUBP            fpureg,fpu0              8086,FPU
     FSUBP                                     8086,FPU,ND
     FSUBR            mem32                    8086,FPU
     FSUBR            mem64                    8086,FPU
     FSUBR            fpureg|to                8086,FPU
     FSUBR            fpureg,fpu0              8086,FPU
     FSUBR            fpureg                   8086,FPU
     FSUBR            fpu0,fpureg              8086,FPU
     FSUBR                                     8086,FPU,ND
     FSUBRP           fpureg                   8086,FPU
     FSUBRP           fpureg,fpu0              8086,FPU
     FSUBRP                                    8086,FPU,ND
     FTST                                      8086,FPU
     FUCOM            fpureg                   386,FPU
     FUCOM            fpu0,fpureg              386,FPU
     FUCOM                                     386,FPU,ND
     FUCOMI           fpureg                   P6,FPU
     FUCOMI           fpu0,fpureg              P6,FPU
     FUCOMI                                    P6,FPU,ND
     FUCOMIP          fpureg                   P6,FPU
     FUCOMIP          fpu0,fpureg              P6,FPU
     FUCOMIP                                   P6,FPU,ND
     FUCOMP           fpureg                   386,FPU
     FUCOMP           fpu0,fpureg              386,FPU
     FUCOMP                                    386,FPU,ND
     FUCOMPP                                   386,FPU
     FXAM                                      8086,FPU
     FXCH             fpureg                   8086,FPU
     FXCH             fpureg,fpu0              8086,FPU
     FXCH             fpu0,fpureg              8086,FPU
     FXCH                                      8086,FPU,ND
     FXTRACT                                   8086,FPU
     FYL2X                                     8086,FPU
     FYL2XP1                                   8086,FPU
     HLT                                       8086,PRIV
     IBTS             mem,reg16                386,SW,UNDOC,ND
     IBTS             reg16,reg16              386,UNDOC,ND
     IBTS             mem,reg32                386,SD,UNDOC,ND
     IBTS             reg32,reg32              386,UNDOC,ND
     ICEBP                                     386,ND
     IDIV             rm8                      8086
     IDIV             rm16                     8086
     IDIV             rm32                     386
     IDIV             rm64                     X64
     IMUL             rm8                      8086
     IMUL             rm16                     8086
     IMUL             rm32                     386
     IMUL             rm64                     X64
     IMUL             reg16,mem                386
     IMUL             reg16,reg16              386
     IMUL             reg32,mem                386
     IMUL             reg32,reg32              386
     IMUL             reg64,mem                X64
     IMUL             reg64,reg64              X64
     IMUL             reg16,mem,imm8           186
     IMUL             reg16,mem,sbyte16        186,ND
     IMUL             reg16,mem,imm16          186
     IMUL             reg16,mem,imm            186,ND
     IMUL             reg16,reg16,imm8         186
     IMUL             reg16,reg16,sbyte16      186,ND
     IMUL             reg16,reg16,imm16        186
     IMUL             reg16,reg16,imm          186,ND
     IMUL             reg32,mem,imm8           386
     IMUL             reg32,mem,sbyte32        386,ND
     IMUL             reg32,mem,imm32          386
     IMUL             reg32,mem,imm            386,ND
     IMUL             reg32,reg32,imm8         386
     IMUL             reg32,reg32,sbyte32      386,ND
     IMUL             reg32,reg32,imm32        386
     IMUL             reg32,reg32,imm          386,ND
     IMUL             reg64,mem,imm8           X64
     IMUL             reg64,mem,sbyte64        X64,ND
     IMUL             reg64,mem,imm32          X64
     IMUL             reg64,mem,imm            X64,ND
     IMUL             reg64,reg64,imm8         X64
     IMUL             reg64,reg64,sbyte64      X64,ND
     IMUL             reg64,reg64,imm32        X64
     IMUL             reg64,reg64,imm          X64,ND
     IMUL             reg16,imm8               186
     IMUL             reg16,sbyte16            186,ND
     IMUL             reg16,imm16              186
     IMUL             reg16,imm                186,ND
     IMUL             reg32,imm8               386
     IMUL             reg32,sbyte32            386,ND
     IMUL             reg32,imm32              386
     IMUL             reg32,imm                386,ND
     IMUL             reg64,imm8               X64
     IMUL             reg64,sbyte64            X64,ND
     IMUL             reg64,imm32              X64
     IMUL             reg64,imm                X64,ND
     IN               reg_al,imm               8086
     IN               reg_ax,imm               8086
     IN               reg_eax,imm              386
     IN               reg_al,reg_dx            8086
     IN               reg_ax,reg_dx            8086
     IN               reg_eax,reg_dx           386
     INC              reg16                    8086,NOLONG
     INC              reg32                    386,NOLONG
     INC              rm8                      8086
     INC              rm16                     8086
     INC              rm32                     386
     INC              rm64                     X64
     INCBIN
     INSB                                      186
     INSD                                      386
     INSW                                      186
     INT              imm                      8086
     INT01                                     386,ND
     INT1                                      386
     INT03                                     8086,ND
     INT3                                      8086
     INTO                                      8086,NOLONG
     INVD                                      486,PRIV
     INVLPG           mem                      486,PRIV
     INVLPGA          reg_ax,reg_ecx           X86_64,AMD,NOLONG
     INVLPGA          reg_eax,reg_ecx          X86_64,AMD
     INVLPGA          reg_rax,reg_ecx          X64,AMD
     INVLPGA                                   X86_64,AMD
     IRET                                      8086
     IRETD                                     386
     IRETQ                                     X64
     IRETW                                     8086
     JCXZ             imm                      8086,NOLONG
     JECXZ            imm                      386
     JRCXZ            imm                      X64
     JMP              imm|short                8086
     JMP              imm                      8086,ND
     JMP              imm                      8086
     JMP              imm|near                 8086,ND
     JMP              imm|far                  8086,ND,NOLONG
     JMP              imm16                    8086
     JMP              imm16|near               8086,ND
     JMP              imm16|far                8086,ND,NOLONG
     JMP              imm32                    386
     JMP              imm32|near               386,ND
     JMP              imm32|far                386,ND,NOLONG
     JMP              imm:imm                  8086,NOLONG
     JMP              imm16:imm                8086,NOLONG
     JMP              imm:imm16                8086,NOLONG
     JMP              imm32:imm                386,NOLONG
     JMP              imm:imm32                386,NOLONG
     JMP              mem|far                  8086,NOLONG
     JMP              mem|far                  X64
     JMP              mem16|far                8086
     JMP              mem32|far                386
     JMP              mem64|far                X64
     JMP              mem|near                 8086
     JMP              mem16|near               8086
     JMP              mem32|near               386,NOLONG
     JMP              mem64|near               X64
     JMP              reg16                    8086
     JMP              reg32                    386,NOLONG
     JMP              reg64                    X64
     JMP              mem                      8086
     JMP              mem16                    8086
     JMP              mem32                    386,NOLONG
     JMP              mem64                    X64
     JMPE             imm                      IA64
     JMPE             imm16                    IA64
     JMPE             imm32                    IA64
     JMPE             rm16                     IA64
     JMPE             rm32                     IA64
     LAHF                                      8086
     LAR              reg16,mem                286,PROT,SW
     LAR              reg16,reg16              286,PROT
     LAR              reg16,reg32              386,PROT
     LAR              reg16,reg64              X64,PROT,ND
     LAR              reg32,mem                386,PROT,SW
     LAR              reg32,reg16              386,PROT
     LAR              reg32,reg32              386,PROT
     LAR              reg32,reg64              X64,PROT,ND
     LAR              reg64,mem                X64,PROT,SW
     LAR              reg64,reg16              X64,PROT
     LAR              reg64,reg32              X64,PROT
     LAR              reg64,reg64              X64,PROT
     LDS              reg16,mem                8086,NOLONG
     LDS              reg32,mem                386,NOLONG
     LEA              reg16,mem                8086
     LEA              reg32,mem                386
     LEA              reg64,mem                X64
     LEAVE                                     186
     LES              reg16,mem                8086,NOLONG
     LES              reg32,mem                386,NOLONG
     LFENCE                                    X64,AMD
     LFS              reg16,mem                386
     LFS              reg32,mem                386
     LGDT             mem                      286,PRIV
     LGS              reg16,mem                386
     LGS              reg32,mem                386
     LIDT             mem                      286,PRIV
     LLDT             mem                      286,PROT,PRIV
     LLDT             mem16                    286,PROT,PRIV
     LLDT             reg16                    286,PROT,PRIV
     LMSW             mem                      286,PRIV
     LMSW             mem16                    286,PRIV
     LMSW             reg16                    286,PRIV
     LOADALL                                   386,UNDOC
     LOADALL286                                286,UNDOC
     LODSB                                     8086
     LODSD                                     386
     LODSQ                                     X64
     LODSW                                     8086
     LOOP             imm                      8086
     LOOP             imm,reg_cx               8086,NOLONG
     LOOP             imm,reg_ecx              386
     LOOP             imm,reg_rcx              X64
     LOOPE            imm                      8086
     LOOPE            imm,reg_cx               8086,NOLONG
     LOOPE            imm,reg_ecx              386
     LOOPE            imm,reg_rcx              X64
     LOOPNE           imm                      8086
     LOOPNE           imm,reg_cx               8086,NOLONG
     LOOPNE           imm,reg_ecx              386
     LOOPNE           imm,reg_rcx              X64
     LOOPNZ           imm                      8086
     LOOPNZ           imm,reg_cx               8086,NOLONG
     LOOPNZ           imm,reg_ecx              386
     LOOPNZ           imm,reg_rcx              X64
     LOOPZ            imm                      8086
     LOOPZ            imm,reg_cx               8086,NOLONG
     LOOPZ            imm,reg_ecx              386
     LOOPZ            imm,reg_rcx              X64
     LSL              reg16,mem                286,PROT,SW
     LSL              reg16,reg16              286,PROT
     LSL              reg16,reg32              386,PROT
     LSL              reg16,reg64              X64,PROT,ND
     LSL              reg32,mem                386,PROT,SW
     LSL              reg32,reg16              386,PROT
     LSL              reg32,reg32              386,PROT
     LSL              reg32,reg64              X64,PROT,ND
     LSL              reg64,mem                X64,PROT,SW
     LSL              reg64,reg16              X64,PROT
     LSL              reg64,reg32              X64,PROT
     LSL              reg64,reg64              X64,PROT
     LSS              reg16,mem                386
     LSS              reg32,mem                386
     LTR              mem                      286,PROT,PRIV
     LTR              mem16                    286,PROT,PRIV
     LTR              reg16                    286,PROT,PRIV
     MFENCE                                    X64,AMD
     MONITOR                                   PRESCOTT
     MONITOR          reg_eax,reg_ecx,reg_edx  PRESCOTT,ND
     MONITOR          reg_rax,reg_ecx,reg_edx  X64,ND
     MOV              mem,reg_sreg             8086
     MOV              reg16,reg_sreg           8086
     MOV              reg32,reg_sreg           386
     MOV              reg_sreg,mem             8086
     MOV              reg_sreg,reg16           8086
     MOV              reg_sreg,reg32           386
     MOV              reg_al,mem_offs          8086
     MOV              reg_ax,mem_offs          8086
     MOV              reg_eax,mem_offs         386
     MOV              reg_rax,mem_offs         X64
     MOV              mem_offs,reg_al          8086
     MOV              mem_offs,reg_ax          8086
     MOV              mem_offs,reg_eax         386
     MOV              mem_offs,reg_rax         X64
     MOV              reg32,reg_creg           386,PRIV,NOLONG
     MOV              reg64,reg_creg           X64,PRIV
     MOV              reg_creg,reg32           386,PRIV,NOLONG
     MOV              reg_creg,reg64           X64,PRIV
     MOV              reg32,reg_dreg           386,PRIV,NOLONG
     MOV              reg64,reg_dreg           X64,PRIV
     MOV              reg_dreg,reg32           386,PRIV,NOLONG
     MOV              reg_dreg,reg64           X64,PRIV
     MOV              reg32,reg_treg           386,NOLONG,ND
     MOV              reg_treg,reg32           386,NOLONG,ND
     MOV              mem,reg8                 8086
     MOV              reg8,reg8                8086
     MOV              mem,reg16                8086
     MOV              reg16,reg16              8086
     MOV              mem,reg32                386
     MOV              reg32,reg32              386
     MOV              mem,reg64                X64
     MOV              reg64,reg64              X64
     MOV              reg8,mem                 8086
     MOV              reg8,reg8                8086
     MOV              reg16,mem                8086
     MOV              reg16,reg16              8086
     MOV              reg32,mem                386
     MOV              reg32,reg32              386
     MOV              reg64,mem                X64
     MOV              reg64,reg64              X64
     MOV              reg8,imm                 8086
     MOV              reg16,imm                8086
     MOV              reg32,imm                386
     MOV              reg64,imm                X64
     MOV              reg64,imm32              X64
     MOV              rm8,imm                  8086
     MOV              rm16,imm                 8086
     MOV              rm32,imm                 386
     MOV              rm64,imm                 X64
     MOV              mem,imm8                 8086
     MOV              mem,imm16                8086
     MOV              mem,imm32                386
     MOVD             mmxreg,mem               PENT,MMX,SD
     MOVD             mmxreg,reg32             PENT,MMX
     MOVD             mem,mmxreg               PENT,MMX,SD
     MOVD             reg32,mmxreg             PENT,MMX
     MOVD             xmmreg,mem               X64,SD
     MOVD             xmmreg,reg32             X64
     MOVD             mem,xmmreg               X64,SD
     MOVD             reg32,xmmreg             X64,SSE
     MOVQ             mmxreg,mmxrm             PENT,MMX
     MOVQ             mmxrm,mmxreg             PENT,MMX
     MOVQ             mmxreg,rm64              X64,MMX
     MOVQ             rm64,mmxreg              X64,MMX
     MOVSB                                     8086
     MOVSD                                     386
     MOVSQ                                     X64
     MOVSW                                     8086
     MOVSX            reg16,mem                386
     MOVSX            reg16,reg8               386
     MOVSX            reg32,rm8                386
     MOVSX            reg32,rm16               386
     MOVSX            reg64,rm8                X64
     MOVSX            reg64,rm16               X64
     MOVSXD           reg64,rm32               X64
     MOVSX            reg64,rm32               X64,ND
     MOVZX            reg16,mem                386
     MOVZX            reg16,reg8               386
     MOVZX            reg32,rm8                386
     MOVZX            reg32,rm16               386
     MOVZX            reg64,rm8                X64
     MOVZX            reg64,rm16               X64
     MUL              rm8                      8086
     MUL              rm16                     8086
     MUL              rm32                     386
     MUL              rm64                     X64
     MWAIT                                     PRESCOTT
     MWAIT            reg_eax,reg_ecx          PRESCOTT,ND
     NEG              rm8                      8086
     NEG              rm16                     8086
     NEG              rm32                     386
     NEG              rm64                     X64
     NOP                                       8086
     NOP              rm16                     P6
     NOP              rm32                     P6
     NOP              rm64                     X64
     NOT              rm8                      8086
     NOT              rm16                     8086
     NOT              rm32                     386
     NOT              rm64                     X64
     OR               mem,reg8                 8086
     OR               reg8,reg8                8086
     OR               mem,reg16                8086
     OR               reg16,reg16              8086
     OR               mem,reg32                386
     OR               reg32,reg32              386
     OR               mem,reg64                X64
     OR               reg64,reg64              X64
     OR               reg8,mem                 8086
     OR               reg8,reg8                8086
     OR               reg16,mem                8086
     OR               reg16,reg16              8086
     OR               reg32,mem                386
     OR               reg32,reg32              386
     OR               reg64,mem                X64
     OR               reg64,reg64              X64
     OR               rm16,imm8                8086
     OR               rm32,imm8                386
     OR               rm64,imm8                X64
     OR               reg_al,imm               8086
     OR               reg_ax,sbyte16           8086
     OR               reg_ax,imm               8086
     OR               reg_eax,sbyte32          386
     OR               reg_eax,imm              386
     OR               reg_rax,sbyte64          X64
     OR               reg_rax,imm              X64
     OR               rm8,imm                  8086
     OR               rm16,imm                 8086
     OR               rm32,imm                 386
     OR               rm64,imm                 X64
     OR               mem,imm8                 8086
     OR               mem,imm16                8086
     OR               mem,imm32                386
     OUT              imm,reg_al               8086
     OUT              imm,reg_ax               8086
     OUT              imm,reg_eax              386
     OUT              reg_dx,reg_al            8086
     OUT              reg_dx,reg_ax            8086
     OUT              reg_dx,reg_eax           386
     OUTSB                                     186
     OUTSD                                     386
     OUTSW                                     186
     PACKSSDW         mmxreg,mmxrm             PENT,MMX
     PACKSSWB         mmxreg,mmxrm             PENT,MMX
     PACKUSWB         mmxreg,mmxrm             PENT,MMX
     PADDB            mmxreg,mmxrm             PENT,MMX
     PADDD            mmxreg,mmxrm             PENT,MMX
     PADDSB           mmxreg,mmxrm             PENT,MMX
     PADDSIW          mmxreg,mmxrm             PENT,MMX,CYRIX
     PADDSW           mmxreg,mmxrm             PENT,MMX
     PADDUSB          mmxreg,mmxrm             PENT,MMX
     PADDUSW          mmxreg,mmxrm             PENT,MMX
     PADDW            mmxreg,mmxrm             PENT,MMX
     PAND             mmxreg,mmxrm             PENT,MMX
     PANDN            mmxreg,mmxrm             PENT,MMX
     PAUSE                                     8086
     PAVEB            mmxreg,mmxrm             PENT,MMX,CYRIX
     PAVGUSB          mmxreg,mmxrm             PENT,3DNOW
     PCMPEQB          mmxreg,mmxrm             PENT,MMX
     PCMPEQD          mmxreg,mmxrm             PENT,MMX
     PCMPEQW          mmxreg,mmxrm             PENT,MMX
     PCMPGTB          mmxreg,mmxrm             PENT,MMX
     PCMPGTD          mmxreg,mmxrm             PENT,MMX
     PCMPGTW          mmxreg,mmxrm             PENT,MMX
     PDISTIB          mmxreg,mem               PENT,MMX,CYRIX
     PF2ID            mmxreg,mmxrm             PENT,3DNOW
     PFACC            mmxreg,mmxrm             PENT,3DNOW
     PFADD            mmxreg,mmxrm             PENT,3DNOW
     PFCMPEQ          mmxreg,mmxrm             PENT,3DNOW
     PFCMPGE          mmxreg,mmxrm             PENT,3DNOW
     PFCMPGT          mmxreg,mmxrm             PENT,3DNOW
     PFMAX            mmxreg,mmxrm             PENT,3DNOW
     PFMIN            mmxreg,mmxrm             PENT,3DNOW
     PFMUL            mmxreg,mmxrm             PENT,3DNOW
     PFRCP            mmxreg,mmxrm             PENT,3DNOW
     PFRCPIT1         mmxreg,mmxrm             PENT,3DNOW
     PFRCPIT2         mmxreg,mmxrm             PENT,3DNOW
     PFRSQIT1         mmxreg,mmxrm             PENT,3DNOW
     PFRSQRT          mmxreg,mmxrm             PENT,3DNOW
     PFSUB            mmxreg,mmxrm             PENT,3DNOW
     PFSUBR           mmxreg,mmxrm             PENT,3DNOW
     PI2FD            mmxreg,mmxrm             PENT,3DNOW
     PMACHRIW         mmxreg,mem               PENT,MMX,CYRIX
     PMADDWD          mmxreg,mmxrm             PENT,MMX
     PMAGW            mmxreg,mmxrm             PENT,MMX,CYRIX
     PMULHRIW         mmxreg,mmxrm             PENT,MMX,CYRIX
     PMULHRWA         mmxreg,mmxrm             PENT,3DNOW
     PMULHRWC         mmxreg,mmxrm             PENT,MMX,CYRIX
     PMULHW           mmxreg,mmxrm             PENT,MMX
     PMULLW           mmxreg,mmxrm             PENT,MMX
     PMVGEZB          mmxreg,mem               PENT,MMX,CYRIX
     PMVLZB           mmxreg,mem               PENT,MMX,CYRIX
     PMVNZB           mmxreg,mem               PENT,MMX,CYRIX
     PMVZB            mmxreg,mem               PENT,MMX,CYRIX
     POP              reg16                    8086
     POP              reg32                    386,NOLONG
     POP              reg64                    X64
     POP              rm16                     8086
     POP              rm32                     386,NOLONG
     POP              rm64                     X64
     POP              reg_cs                   8086,UNDOC,ND
     POP              reg_dess                 8086,NOLONG
     POP              reg_fsgs                 386
     POPA                                      186,NOLONG
     POPAD                                     386,NOLONG
     POPAW                                     186,NOLONG
     POPF                                      8086
     POPFD                                     386,NOLONG
     POPFQ                                     X64
     POPFW                                     8086
     POR              mmxreg,mmxrm             PENT,MMX
     PREFETCH         mem                      PENT,3DNOW
     PREFETCHW        mem                      PENT,3DNOW
     PSLLD            mmxreg,mmxrm             PENT,MMX
     PSLLD            mmxreg,imm               PENT,MMX
     PSLLQ            mmxreg,mmxrm             PENT,MMX
     PSLLQ            mmxreg,imm               PENT,MMX
     PSLLW            mmxreg,mmxrm             PENT,MMX
     PSLLW            mmxreg,imm               PENT,MMX
     PSRAD            mmxreg,mmxrm             PENT,MMX
     PSRAD            mmxreg,imm               PENT,MMX
     PSRAW            mmxreg,mmxrm             PENT,MMX
     PSRAW            mmxreg,imm               PENT,MMX
     PSRLD            mmxreg,mmxrm             PENT,MMX
     PSRLD            mmxreg,imm               PENT,MMX
     PSRLQ            mmxreg,mmxrm             PENT,MMX
     PSRLQ            mmxreg,imm               PENT,MMX
     PSRLW            mmxreg,mmxrm             PENT,MMX
     PSRLW            mmxreg,imm               PENT,MMX
     PSUBB            mmxreg,mmxrm             PENT,MMX
     PSUBD            mmxreg,mmxrm             PENT,MMX
     PSUBSB           mmxreg,mmxrm             PENT,MMX
     PSUBSIW          mmxreg,mmxrm             PENT,MMX,CYRIX
     PSUBSW           mmxreg,mmxrm             PENT,MMX
     PSUBUSB          mmxreg,mmxrm             PENT,MMX
     PSUBUSW          mmxreg,mmxrm             PENT,MMX
     PSUBW            mmxreg,mmxrm             PENT,MMX
     PUNPCKHBW        mmxreg,mmxrm             PENT,MMX
     PUNPCKHDQ        mmxreg,mmxrm             PENT,MMX
     PUNPCKHWD        mmxreg,mmxrm             PENT,MMX
     PUNPCKLBW        mmxreg,mmxrm             PENT,MMX
     PUNPCKLDQ        mmxreg,mmxrm             PENT,MMX
     PUNPCKLWD        mmxreg,mmxrm             PENT,MMX
     PUSH             reg16                    8086
     PUSH             reg32                    386,NOLONG
     PUSH             reg64                    X64
     PUSH             rm16                     8086
     PUSH             rm32                     386,NOLONG
     PUSH             rm64                     X64
     PUSH             reg_cs                   8086,NOLONG
     PUSH             reg_dess                 8086,NOLONG
     PUSH             reg_fsgs                 386
     PUSH             imm8                     186
     PUSH             imm16                    186,AR0,SZ
     PUSH             imm32                    386,NOLONG,AR0,SZ
     PUSH             imm32                    386,NOLONG,SD
     PUSH             imm64                    X64,AR0,SZ
     PUSHA                                     186,NOLONG
     PUSHAD                                    386,NOLONG
     PUSHAW                                    186,NOLONG
     PUSHF                                     8086
     PUSHFD                                    386,NOLONG
     PUSHFQ                                    X64
     PUSHFW                                    8086
     PXOR             mmxreg,mmxrm             PENT,MMX
     RCL              rm8,unity                8086
     RCL              rm8,reg_cl               8086
     RCL              rm8,imm                  186
     RCL              rm16,unity               8086
     RCL              rm16,reg_cl              8086
     RCL              rm16,imm                 186
     RCL              rm32,unity               386
     RCL              rm32,reg_cl              386
     RCL              rm32,imm                 386
     RCL              rm64,unity               X64
     RCL              rm64,reg_cl              X64
     RCL              rm64,imm                 X64
     RCR              rm8,unity                8086
     RCR              rm8,reg_cl               8086
     RCR              rm8,imm                  186
     RCR              rm16,unity               8086
     RCR              rm16,reg_cl              8086
     RCR              rm16,imm                 186
     RCR              rm32,unity               386
     RCR              rm32,reg_cl              386
     RCR              rm32,imm                 386
     RCR              rm64,unity               X64
     RCR              rm64,reg_cl              X64
     RCR              rm64,imm                 X64
     RDSHR            rm32                     P6,CYRIXM
     RDMSR                                     PENT,PRIV
     RDPMC                                     P6
     RDTSC                                     PENT
     RDTSCP                                    X86_64
     RET                                       8086
     RET              imm                      8086,SW
     RETF                                      8086
     RETF             imm                      8086,SW
     RETN                                      8086
     RETN             imm                      8086,SW
     ROL              rm8,unity                8086
     ROL              rm8,reg_cl               8086
     ROL              rm8,imm                  186
     ROL              rm16,unity               8086
     ROL              rm16,reg_cl              8086
     ROL              rm16,imm                 186
     ROL              rm32,unity               386
     ROL              rm32,reg_cl              386
     ROL              rm32,imm                 386
     ROL              rm64,unity               X64
     ROL              rm64,reg_cl              X64
     ROL              rm64,imm                 X64
     ROR              rm8,unity                8086
     ROR              rm8,reg_cl               8086
     ROR              rm8,imm                  186
     ROR              rm16,unity               8086
     ROR              rm16,reg_cl              8086
     ROR              rm16,imm                 186
     ROR              rm32,unity               386
     ROR              rm32,reg_cl              386
     ROR              rm32,imm                 386
     ROR              rm64,unity               X64
     ROR              rm64,reg_cl              X64
     ROR              rm64,imm                 X64
     RDM                                       P6,CYRIX,ND
     RSDC             reg_sreg,mem80           486,CYRIXM
     RSLDT            mem80                    486,CYRIXM
     RSM                                       PENTM
     RSTS             mem80                    486,CYRIXM
     SAHF                                      8086
     SAL              rm8,unity                8086,ND
     SAL              rm8,reg_cl               8086,ND
     SAL              rm8,imm                  186,ND
     SAL              rm16,unity               8086,ND
     SAL              rm16,reg_cl              8086,ND
     SAL              rm16,imm                 186,ND
     SAL              rm32,unity               386,ND
     SAL              rm32,reg_cl              386,ND
     SAL              rm32,imm                 386,ND
     SAL              rm64,unity               X64,ND
     SAL              rm64,reg_cl              X64,ND
     SAL              rm64,imm                 X64,ND
     SALC                                      8086,UNDOC
     SAR              rm8,unity                8086
     SAR              rm8,reg_cl               8086
     SAR              rm8,imm                  186
     SAR              rm16,unity               8086
     SAR              rm16,reg_cl              8086
     SAR              rm16,imm                 186
     SAR              rm32,unity               386
     SAR              rm32,reg_cl              386
     SAR              rm32,imm                 386
     SAR              rm64,unity               X64
     SAR              rm64,reg_cl              X64
     SAR              rm64,imm                 X64
     SBB              mem,reg8                 8086
     SBB              reg8,reg8                8086
     SBB              mem,reg16                8086
     SBB              reg16,reg16              8086
     SBB              mem,reg32                386
     SBB              reg32,reg32              386
     SBB              mem,reg64                X64
     SBB              reg64,reg64              X64
     SBB              reg8,mem                 8086
     SBB              reg8,reg8                8086
     SBB              reg16,mem                8086
     SBB              reg16,reg16              8086
     SBB              reg32,mem                386
     SBB              reg32,reg32              386
     SBB              reg64,mem                X64
     SBB              reg64,reg64              X64
     SBB              rm16,imm8                8086
     SBB              rm32,imm8                386
     SBB              rm64,imm8                X64
     SBB              reg_al,imm               8086
     SBB              reg_ax,sbyte16           8086
     SBB              reg_ax,imm               8086
     SBB              reg_eax,sbyte32          386
     SBB              reg_eax,imm              386
     SBB              reg_rax,sbyte64          X64
     SBB              reg_rax,imm              X64
     SBB              rm8,imm                  8086
     SBB              rm16,imm                 8086
     SBB              rm32,imm                 386
     SBB              rm64,imm                 X64
     SBB              mem,imm8                 8086
     SBB              mem,imm16                8086
     SBB              mem,imm32                386
     SCASB                                     8086
     SCASD                                     386
     SCASQ                                     X64
     SCASW                                     8086
     SFENCE                                    X64,AMD
     SGDT             mem                      286
     SHL              rm8,unity                8086
     SHL              rm8,reg_cl               8086
     SHL              rm8,imm                  186
     SHL              rm16,unity               8086
     SHL              rm16,reg_cl              8086
     SHL              rm16,imm                 186
     SHL              rm32,unity               386
     SHL              rm32,reg_cl              386
     SHL              rm32,imm                 386
     SHL              rm64,unity               X64
     SHL              rm64,reg_cl              X64
     SHL              rm64,imm                 X64
     SHLD             mem,reg16,imm            3862
     SHLD             reg16,reg16,imm          3862
     SHLD             mem,reg32,imm            3862
     SHLD             reg32,reg32,imm          3862
     SHLD             mem,reg64,imm            X642
     SHLD             reg64,reg64,imm          X642
     SHLD             mem,reg16,reg_cl         386
     SHLD             reg16,reg16,reg_cl       386
     SHLD             mem,reg32,reg_cl         386
     SHLD             reg32,reg32,reg_cl       386
     SHLD             mem,reg64,reg_cl         X64
     SHLD             reg64,reg64,reg_cl       X64
     SHR              rm8,unity                8086
     SHR              rm8,reg_cl               8086
     SHR              rm8,imm                  186
     SHR              rm16,unity               8086
     SHR              rm16,reg_cl              8086
     SHR              rm16,imm                 186
     SHR              rm32,unity               386
     SHR              rm32,reg_cl              386
     SHR              rm32,imm                 386
     SHR              rm64,unity               X64
     SHR              rm64,reg_cl              X64
     SHR              rm64,imm                 X64
     SHRD             mem,reg16,imm            3862
     SHRD             reg16,reg16,imm          3862
     SHRD             mem,reg32,imm            3862
     SHRD             reg32,reg32,imm          3862
     SHRD             mem,reg64,imm            X642
     SHRD             reg64,reg64,imm          X642
     SHRD             mem,reg16,reg_cl         386
     SHRD             reg16,reg16,reg_cl       386
     SHRD             mem,reg32,reg_cl         386
     SHRD             reg32,reg32,reg_cl       386
     SHRD             mem,reg64,reg_cl         X64
     SHRD             reg64,reg64,reg_cl       X64
     SIDT             mem                      286
     SLDT             mem                      286
     SLDT             mem16                    286
     SLDT             reg16                    286
     SLDT             reg32                    386
     SLDT             reg64                    X64,ND
     SLDT             reg64                    X64
     SKINIT                                    X64
     SMI                                       386,UNDOC
     SMINT                                     P6,CYRIX,ND
     SMINTOLD                                  486,CYRIX,ND
     SMSW             mem                      286
     SMSW             mem16                    286
     SMSW             reg16                    286
     SMSW             reg32                    386
     STC                                       8086
     STD                                       8086
     STGI                                      X64
     STI                                       8086
     STOSB                                     8086
     STOSD                                     386
     STOSQ                                     X64
     STOSW                                     8086
     STR              mem                      286,PROT
     STR              mem16                    286,PROT
     STR              reg16                    286,PROT
     STR              reg32                    386,PROT
     STR              reg64                    X64
     SUB              mem,reg8                 8086
     SUB              reg8,reg8                8086
     SUB              mem,reg16                8086
     SUB              reg16,reg16              8086
     SUB              mem,reg32                386
     SUB              reg32,reg32              386
     SUB              mem,reg64                X64
     SUB              reg64,reg64              X64
     SUB              reg8,mem                 8086
     SUB              reg8,reg8                8086
     SUB              reg16,mem                8086
     SUB              reg16,reg16              8086
     SUB              reg32,mem                386
     SUB              reg32,reg32              386
     SUB              reg64,mem                X64
     SUB              reg64,reg64              X64
     SUB              rm16,imm8                8086
     SUB              rm32,imm8                386
     SUB              rm64,imm8                X64
     SUB              reg_al,imm               8086
     SUB              reg_ax,sbyte16           8086
     SUB              reg_ax,imm               8086
     SUB              reg_eax,sbyte32          386
     SUB              reg_eax,imm              386
     SUB              reg_rax,sbyte64          X64
     SUB              reg_rax,imm              X64
     SUB              rm8,imm                  8086
     SUB              rm16,imm                 8086
     SUB              rm32,imm                 386
     SUB              rm64,imm                 X64
     SUB              mem,imm8                 8086
     SUB              mem,imm16                8086
     SUB              mem,imm32                386
     SVDC             mem80,reg_sreg           486,CYRIXM
     SVLDT            mem80                    486,CYRIXM,ND
     SVTS             mem80                    486,CYRIXM
     SWAPGS                                    X64
     SYSCALL                                   P6,AMD
     SYSENTER                                  P6
     SYSEXIT                                   P6,PRIV
     SYSRET                                    P6,PRIV,AMD
     TEST             mem,reg8                 8086
     TEST             reg8,reg8                8086
     TEST             mem,reg16                8086
     TEST             reg16,reg16              8086
     TEST             mem,reg32                386
     TEST             reg32,reg32              386
     TEST             mem,reg64                X64
     TEST             reg64,reg64              X64
     TEST             reg8,mem                 8086
     TEST             reg16,mem                8086
     TEST             reg32,mem                386
     TEST             reg64,mem                X64
     TEST             reg_al,imm               8086
     TEST             reg_ax,imm               8086
     TEST             reg_eax,imm              386
     TEST             reg_rax,imm              X64
     TEST             rm8,imm                  8086
     TEST             rm16,imm                 8086
     TEST             rm32,imm                 386
     TEST             rm64,imm                 X64
     TEST             mem,imm8                 8086
     TEST             mem,imm16                8086
     TEST             mem,imm32                386
     UD0                                       186,UNDOC
     UD1                                       186,UNDOC
     UD2B                                      186,UNDOC,ND
     UD2                                       186
     UD2A                                      186,ND
     UMOV             mem,reg8                 386,UNDOC,ND
     UMOV             reg8,reg8                386,UNDOC,ND
     UMOV             mem,reg16                386,UNDOC,ND
     UMOV             reg16,reg16              386,UNDOC,ND
     UMOV             mem,reg32                386,UNDOC,ND
     UMOV             reg32,reg32              386,UNDOC,ND
     UMOV             reg8,mem                 386,UNDOC,ND
     UMOV             reg8,reg8                386,UNDOC,ND
     UMOV             reg16,mem                386,UNDOC,ND
     UMOV             reg16,reg16              386,UNDOC,ND
     UMOV             reg32,mem                386,UNDOC,ND
     UMOV             reg32,reg32              386,UNDOC,ND
     VERR             mem                      286,PROT
     VERR             mem16                    286,PROT
     VERR             reg16                    286,PROT
     VERW             mem                      286,PROT
     VERW             mem16                    286,PROT
     VERW             reg16                    286,PROT
     FWAIT                                     8086
     WBINVD                                    486,PRIV
     WRSHR            rm32                     P6,CYRIXM
     WRMSR                                     PENT,PRIV
     XADD             mem,reg8                 486
     XADD             reg8,reg8                486
     XADD             mem,reg16                486
     XADD             reg16,reg16              486
     XADD             mem,reg32                486
     XADD             reg32,reg32              486
     XADD             mem,reg64                X64
     XADD             reg64,reg64              X64
     XBTS             reg16,mem                386,SW,UNDOC,ND
     XBTS             reg16,reg16              386,UNDOC,ND
     XBTS             reg32,mem                386,SD,UNDOC,ND
     XBTS             reg32,reg32              386,UNDOC,ND
     XCHG             reg_ax,reg16             8086
     XCHG             reg_eax,reg32na          386
     XCHG             reg_rax,reg64            X64
     XCHG             reg16,reg_ax             8086
     XCHG             reg32na,reg_eax          386
     XCHG             reg64,reg_rax            X64
     XCHG             reg_eax,reg_eax          386,NOLONG
     XCHG             reg8,mem                 8086
     XCHG             reg8,reg8                8086
     XCHG             reg16,mem                8086
     XCHG             reg16,reg16              8086
     XCHG             reg32,mem                386
     XCHG             reg32,reg32              386
     XCHG             reg64,mem                X64
     XCHG             reg64,reg64              X64
     XCHG             mem,reg8                 8086
     XCHG             reg8,reg8                8086
     XCHG             mem,reg16                8086
     XCHG             reg16,reg16              8086
     XCHG             mem,reg32                386
     XCHG             reg32,reg32              386
     XCHG             mem,reg64                X64
     XCHG             reg64,reg64              X64
     XLATB                                     8086
     XLAT                                      8086
     XOR              mem,reg8                 8086
     XOR              reg8,reg8                8086
     XOR              mem,reg16                8086
     XOR              reg16,reg16              8086
     XOR              mem,reg32                386
     XOR              reg32,reg32              386
     XOR              mem,reg64                X64
     XOR              reg64,reg64              X64
     XOR              reg8,mem                 8086
     XOR              reg8,reg8                8086
     XOR              reg16,mem                8086
     XOR              reg16,reg16              8086
     XOR              reg32,mem                386
     XOR              reg32,reg32              386
     XOR              reg64,mem                X64
     XOR              reg64,reg64              X64
     XOR              rm16,imm8                8086
     XOR              rm32,imm8                386
     XOR              rm64,imm8                X64
     XOR              reg_al,imm               8086
     XOR              reg_ax,sbyte16           8086
     XOR              reg_ax,imm               8086
     XOR              reg_eax,sbyte32          386
     XOR              reg_eax,imm              386
     XOR              reg_rax,sbyte64          X64
     XOR              reg_rax,imm              X64
     XOR              rm8,imm                  8086
     XOR              rm16,imm                 8086
     XOR              rm32,imm                 386
     XOR              rm64,imm                 X64
     XOR              mem,imm8                 8086
     XOR              mem,imm16                8086
     XOR              mem,imm32                386
     CMOVcc           reg16,mem                P6
     CMOVcc           reg16,reg16              P6
     CMOVcc           reg32,mem                P6
     CMOVcc           reg32,reg32              P6
     CMOVcc           reg64,mem                X64
     CMOVcc           reg64,reg64              X64
     Jcc              imm|near                 386
     Jcc              imm16|near               386
     Jcc              imm32|near               386
     Jcc              imm|short                8086,ND
     Jcc              imm                      8086,ND
     Jcc              imm                      386,ND
     Jcc              imm                      8086,ND
     Jcc              imm                      8086
     SETcc            mem                      386
     SETcc            reg8                     386


File: nasm.info,  Node: Section B.1.3,  Next: Section B.1.4,  Prev: Section B.1.2,  Up: Section B.1

B.1.3. Katmai Streaming SIMD instructions (SSE --- a.k.a. KNI, XMM, MMX2)
-------------------------------------------------------------------------

     ADDPS            xmmreg,xmmrm             KATMAI,SSE
     ADDSS            xmmreg,xmmrm             KATMAI,SSE,SD
     ANDNPS           xmmreg,xmmrm             KATMAI,SSE
     ANDPS            xmmreg,xmmrm             KATMAI,SSE
     CMPEQPS          xmmreg,xmmrm             KATMAI,SSE
     CMPEQSS          xmmreg,xmmrm             KATMAI,SSE
     CMPLEPS          xmmreg,xmmrm             KATMAI,SSE
     CMPLESS          xmmreg,xmmrm             KATMAI,SSE
     CMPLTPS          xmmreg,xmmrm             KATMAI,SSE
     CMPLTSS          xmmreg,xmmrm             KATMAI,SSE
     CMPNEQPS         xmmreg,xmmrm             KATMAI,SSE
     CMPNEQSS         xmmreg,xmmrm             KATMAI,SSE
     CMPNLEPS         xmmreg,xmmrm             KATMAI,SSE
     CMPNLESS         xmmreg,xmmrm             KATMAI,SSE
     CMPNLTPS         xmmreg,xmmrm             KATMAI,SSE
     CMPNLTSS         xmmreg,xmmrm             KATMAI,SSE
     CMPORDPS         xmmreg,xmmrm             KATMAI,SSE
     CMPORDSS         xmmreg,xmmrm             KATMAI,SSE
     CMPUNORDPS       xmmreg,xmmrm             KATMAI,SSE
     CMPUNORDSS       xmmreg,xmmrm             KATMAI,SSE
     CMPPS            xmmreg,mem,imm           KATMAI,SSE
     CMPPS            xmmreg,xmmreg,imm        KATMAI,SSE
     CMPSS            xmmreg,mem,imm           KATMAI,SSE
     CMPSS            xmmreg,xmmreg,imm        KATMAI,SSE
     COMISS           xmmreg,xmmrm             KATMAI,SSE
     CVTPI2PS         xmmreg,mmxrm             KATMAI,SSE,MMX
     CVTPS2PI         mmxreg,xmmrm             KATMAI,SSE,MMX
     CVTSI2SS         xmmreg,mem               KATMAI,SSE,SD,AR1,ND
     CVTSI2SS         xmmreg,rm32              KATMAI,SSE,SD,AR1
     CVTSI2SS         xmmreg,rm64              X64,SSE,AR1
     CVTSS2SI         reg32,xmmreg             KATMAI,SSE,SD,AR1
     CVTSS2SI         reg32,mem                KATMAI,SSE,SD,AR1
     CVTSS2SI         reg64,xmmreg             X64,SSE,SD,AR1
     CVTSS2SI         reg64,mem                X64,SSE,SD,AR1
     CVTTPS2PI        mmxreg,xmmrm             KATMAI,SSE,MMX
     CVTTSS2SI        reg32,xmmrm              KATMAI,SSE,SD,AR1
     CVTTSS2SI        reg64,xmmrm              X64,SSE,SD,AR1
     DIVPS            xmmreg,xmmrm             KATMAI,SSE
     DIVSS            xmmreg,xmmrm             KATMAI,SSE
     LDMXCSR          mem                      KATMAI,SSE,SD
     MAXPS            xmmreg,xmmrm             KATMAI,SSE
     MAXSS            xmmreg,xmmrm             KATMAI,SSE
     MINPS            xmmreg,xmmrm             KATMAI,SSE
     MINSS            xmmreg,xmmrm             KATMAI,SSE
     MOVAPS           xmmreg,mem               KATMAI,SSE
     MOVAPS           mem,xmmreg               KATMAI,SSE
     MOVAPS           xmmreg,xmmreg            KATMAI,SSE
     MOVAPS           xmmreg,xmmreg            KATMAI,SSE
     MOVHPS           xmmreg,mem               KATMAI,SSE
     MOVHPS           mem,xmmreg               KATMAI,SSE
     MOVLHPS          xmmreg,xmmreg            KATMAI,SSE
     MOVLPS           xmmreg,mem               KATMAI,SSE
     MOVLPS           mem,xmmreg               KATMAI,SSE
     MOVHLPS          xmmreg,xmmreg            KATMAI,SSE
     MOVMSKPS         reg32,xmmreg             KATMAI,SSE
     MOVMSKPS         reg64,xmmreg             X64,SSE
     MOVNTPS          mem,xmmreg               KATMAI,SSE
     MOVSS            xmmreg,mem               KATMAI,SSE
     MOVSS            mem,xmmreg               KATMAI,SSE
     MOVSS            xmmreg,xmmreg            KATMAI,SSE
     MOVSS            xmmreg,xmmreg            KATMAI,SSE
     MOVUPS           xmmreg,mem               KATMAI,SSE
     MOVUPS           mem,xmmreg               KATMAI,SSE
     MOVUPS           xmmreg,xmmreg            KATMAI,SSE
     MOVUPS           xmmreg,xmmreg            KATMAI,SSE
     MULPS            xmmreg,xmmrm             KATMAI,SSE
     MULSS            xmmreg,xmmrm             KATMAI,SSE
     ORPS             xmmreg,xmmrm             KATMAI,SSE
     RCPPS            xmmreg,xmmrm             KATMAI,SSE
     RCPSS            xmmreg,xmmrm             KATMAI,SSE
     RSQRTPS          xmmreg,xmmrm             KATMAI,SSE
     RSQRTSS          xmmreg,xmmrm             KATMAI,SSE
     SHUFPS           xmmreg,mem,imm           KATMAI,SSE
     SHUFPS           xmmreg,xmmreg,imm        KATMAI,SSE
     SQRTPS           xmmreg,xmmrm             KATMAI,SSE
     SQRTSS           xmmreg,xmmrm             KATMAI,SSE
     STMXCSR          mem                      KATMAI,SSE,SD
     SUBPS            xmmreg,xmmrm             KATMAI,SSE
     SUBSS            xmmreg,xmmrm             KATMAI,SSE
     UCOMISS          xmmreg,xmmrm             KATMAI,SSE
     UNPCKHPS         xmmreg,xmmrm             KATMAI,SSE
     UNPCKLPS         xmmreg,xmmrm             KATMAI,SSE
     XORPS            xmmreg,xmmrm             KATMAI,SSE


File: nasm.info,  Node: Section B.1.4,  Next: Section B.1.5,  Prev: Section B.1.3,  Up: Section B.1

B.1.4. Introduced in Deschutes but necessary for SSE support
------------------------------------------------------------

     FXRSTOR          mem                      P6,SSE,FPU
     FXSAVE           mem                      P6,SSE,FPU


File: nasm.info,  Node: Section B.1.5,  Next: Section B.1.6,  Prev: Section B.1.4,  Up: Section B.1

B.1.5. XSAVE group (AVX and extended state)
-------------------------------------------

     XGETBV                                    NEHALEM
     XSETBV                                    NEHALEM,PRIV
     XSAVE            mem                      NEHALEM
     XRSTOR           mem                      NEHALEM


File: nasm.info,  Node: Section B.1.6,  Next: Section B.1.7,  Prev: Section B.1.5,  Up: Section B.1

B.1.6. Generic memory operations
--------------------------------

     PREFETCHNTA      mem                      KATMAI
     PREFETCHT0       mem                      KATMAI
     PREFETCHT1       mem                      KATMAI
     PREFETCHT2       mem                      KATMAI
     SFENCE                                    KATMAI


File: nasm.info,  Node: Section B.1.7,  Next: Section B.1.8,  Prev: Section B.1.6,  Up: Section B.1

B.1.7. New MMX instructions introduced in Katmai
------------------------------------------------

     MASKMOVQ         mmxreg,mmxreg            KATMAI,MMX
     MOVNTQ           mem,mmxreg               KATMAI,MMX
     PAVGB            mmxreg,mmxrm             KATMAI,MMX
     PAVGW            mmxreg,mmxrm             KATMAI,MMX
     PEXTRW           reg32,mmxreg,imm         KATMAI,MMX
     PINSRW           mmxreg,mem,imm           KATMAI,MMX
     PINSRW           mmxreg,rm16,imm          KATMAI,MMX
     PINSRW           mmxreg,reg32,imm         KATMAI,MMX
     PMAXSW           mmxreg,mmxrm             KATMAI,MMX
     PMAXUB           mmxreg,mmxrm             KATMAI,MMX
     PMINSW           mmxreg,mmxrm             KATMAI,MMX
     PMINUB           mmxreg,mmxrm             KATMAI,MMX
     PMOVMSKB         reg32,mmxreg             KATMAI,MMX
     PMULHUW          mmxreg,mmxrm             KATMAI,MMX
     PSADBW           mmxreg,mmxrm             KATMAI,MMX
     PSHUFW           mmxreg,mmxrm,imm         KATMAI,MMX2


File: nasm.info,  Node: Section B.1.8,  Next: Section B.1.9,  Prev: Section B.1.7,  Up: Section B.1

B.1.8. AMD Enhanced 3DNow! (Athlon) instructions
------------------------------------------------

     PF2IW            mmxreg,mmxrm             PENT,3DNOW
     PFNACC           mmxreg,mmxrm             PENT,3DNOW
     PFPNACC          mmxreg,mmxrm             PENT,3DNOW
     PI2FW            mmxreg,mmxrm             PENT,3DNOW
     PSWAPD           mmxreg,mmxrm             PENT,3DNOW


File: nasm.info,  Node: Section B.1.9,  Next: Section B.1.10,  Prev: Section B.1.8,  Up: Section B.1

B.1.9. Willamette SSE2 Cacheability Instructions
------------------------------------------------

     MASKMOVDQU       xmmreg,xmmreg            WILLAMETTE,SSE2
     CLFLUSH          mem                      WILLAMETTE,SSE2
     MOVNTDQ          mem,xmmreg               WILLAMETTE,SSE2,SO
     MOVNTI           mem,reg32                WILLAMETTE,SD
     MOVNTI           mem,reg64                X64
     MOVNTPD          mem,xmmreg               WILLAMETTE,SSE2,SO
     LFENCE                                    WILLAMETTE,SSE2
     MFENCE                                    WILLAMETTE,SSE2


File: nasm.info,  Node: Section B.1.10,  Next: Section B.1.11,  Prev: Section B.1.9,  Up: Section B.1

B.1.10. Willamette MMX instructions (SSE2 SIMD Integer Instructions)
--------------------------------------------------------------------

     MOVD             mem,xmmreg               WILLAMETTE,SSE2,SD
     MOVD             xmmreg,mem               WILLAMETTE,SSE2,SD
     MOVD             xmmreg,rm32              WILLAMETTE,SSE2
     MOVD             rm32,xmmreg              WILLAMETTE,SSE2
     MOVDQA           xmmreg,xmmreg            WILLAMETTE,SSE2
     MOVDQA           mem,xmmreg               WILLAMETTE,SSE2,SO
     MOVDQA           xmmreg,mem               WILLAMETTE,SSE2,SO
     MOVDQA           xmmreg,xmmreg            WILLAMETTE,SSE2
     MOVDQU           xmmreg,xmmreg            WILLAMETTE,SSE2
     MOVDQU           mem,xmmreg               WILLAMETTE,SSE2,SO
     MOVDQU           xmmreg,mem               WILLAMETTE,SSE2,SO
     MOVDQU           xmmreg,xmmreg            WILLAMETTE,SSE2
     MOVDQ2Q          mmxreg,xmmreg            WILLAMETTE,SSE2
     MOVQ             xmmreg,xmmreg            WILLAMETTE,SSE2
     MOVQ             xmmreg,xmmreg            WILLAMETTE,SSE2
     MOVQ             mem,xmmreg               WILLAMETTE,SSE2
     MOVQ             xmmreg,mem               WILLAMETTE,SSE2
     MOVQ             xmmreg,rm64              X64,SSE2
     MOVQ             rm64,xmmreg              X64,SSE2
     MOVQ2DQ          xmmreg,mmxreg            WILLAMETTE,SSE2
     PACKSSWB         xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PACKSSDW         xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PACKUSWB         xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PADDB            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PADDW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PADDD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PADDQ            mmxreg,mmxrm             WILLAMETTE,MMX
     PADDQ            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PADDSB           xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PADDSW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PADDUSB          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PADDUSW          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PAND             xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PANDN            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PAVGB            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PAVGW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PCMPEQB          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PCMPEQW          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PCMPEQD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PCMPGTB          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PCMPGTW          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PCMPGTD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PEXTRW           reg32,xmmreg,imm         WILLAMETTE,SSE2
     PINSRW           xmmreg,reg16,imm         WILLAMETTE,SSE2
     PINSRW           xmmreg,reg32,imm         WILLAMETTE,SSE2,ND
     PINSRW           xmmreg,mem,imm           WILLAMETTE,SSE2
     PINSRW           xmmreg,mem16,imm         WILLAMETTE,SSE2
     PMADDWD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PMAXSW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PMAXUB           xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PMINSW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PMINUB           xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PMOVMSKB         reg32,xmmreg             WILLAMETTE,SSE2
     PMULHUW          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PMULHW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PMULLW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PMULUDQ          mmxreg,mmxrm             WILLAMETTE,SSE2,SO
     PMULUDQ          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     POR              xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSADBW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSHUFD           xmmreg,xmmreg,imm        WILLAMETTE,SSE2
     PSHUFD           xmmreg,mem,imm           WILLAMETTE,SSE22
     PSHUFHW          xmmreg,xmmreg,imm        WILLAMETTE,SSE2
     PSHUFHW          xmmreg,mem,imm           WILLAMETTE,SSE22
     PSHUFLW          xmmreg,xmmreg,imm        WILLAMETTE,SSE2
     PSHUFLW          xmmreg,mem,imm           WILLAMETTE,SSE22
     PSLLDQ           xmmreg,imm               WILLAMETTE,SSE2,AR1
     PSLLW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSLLW            xmmreg,imm               WILLAMETTE,SSE2,AR1
     PSLLD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSLLD            xmmreg,imm               WILLAMETTE,SSE2,AR1
     PSLLQ            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSLLQ            xmmreg,imm               WILLAMETTE,SSE2,AR1
     PSRAW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSRAW            xmmreg,imm               WILLAMETTE,SSE2,AR1
     PSRAD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSRAD            xmmreg,imm               WILLAMETTE,SSE2,AR1
     PSRLDQ           xmmreg,imm               WILLAMETTE,SSE2,AR1
     PSRLW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSRLW            xmmreg,imm               WILLAMETTE,SSE2,AR1
     PSRLD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSRLD            xmmreg,imm               WILLAMETTE,SSE2,AR1
     PSRLQ            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSRLQ            xmmreg,imm               WILLAMETTE,SSE2,AR1
     PSUBB            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSUBW            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSUBD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSUBQ            mmxreg,mmxrm             WILLAMETTE,SSE2,SO
     PSUBQ            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSUBSB           xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSUBSW           xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSUBUSB          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PSUBUSW          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PUNPCKHBW        xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PUNPCKHWD        xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PUNPCKHDQ        xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PUNPCKHQDQ       xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PUNPCKLBW        xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PUNPCKLWD        xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PUNPCKLDQ        xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PUNPCKLQDQ       xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     PXOR             xmmreg,xmmrm             WILLAMETTE,SSE2,SO


File: nasm.info,  Node: Section B.1.11,  Next: Section B.1.12,  Prev: Section B.1.10,  Up: Section B.1

B.1.11. Willamette Streaming SIMD instructions (SSE2)
-----------------------------------------------------

     ADDPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     ADDSD            xmmreg,xmmrm             WILLAMETTE,SSE2
     ANDNPD           xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     ANDPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     CMPEQPD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     CMPEQSD          xmmreg,xmmrm             WILLAMETTE,SSE2
     CMPLEPD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     CMPLESD          xmmreg,xmmrm             WILLAMETTE,SSE2
     CMPLTPD          xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     CMPLTSD          xmmreg,xmmrm             WILLAMETTE,SSE2
     CMPNEQPD         xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     CMPNEQSD         xmmreg,xmmrm             WILLAMETTE,SSE2
     CMPNLEPD         xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     CMPNLESD         xmmreg,xmmrm             WILLAMETTE,SSE2
     CMPNLTPD         xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     CMPNLTSD         xmmreg,xmmrm             WILLAMETTE,SSE2
     CMPORDPD         xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     CMPORDSD         xmmreg,xmmrm             WILLAMETTE,SSE2
     CMPUNORDPD       xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     CMPUNORDSD       xmmreg,xmmrm             WILLAMETTE,SSE2
     CMPPD            xmmreg,xmmrm,imm         WILLAMETTE,SSE22
     CMPSD            xmmreg,xmmrm,imm         WILLAMETTE,SSE2
     COMISD           xmmreg,xmmrm             WILLAMETTE,SSE2
     CVTDQ2PD         xmmreg,xmmrm             WILLAMETTE,SSE2
     CVTDQ2PS         xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     CVTPD2DQ         xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     CVTPD2PI         mmxreg,xmmrm             WILLAMETTE,SSE2,SO
     CVTPD2PS         xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     CVTPI2PD         xmmreg,mmxrm             WILLAMETTE,SSE2
     CVTPS2DQ         xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     CVTPS2PD         xmmreg,xmmrm             WILLAMETTE,SSE2
     CVTSD2SI         reg32,xmmreg             WILLAMETTE,SSE2,AR1
     CVTSD2SI         reg32,mem                WILLAMETTE,SSE2,AR1
     CVTSD2SI         reg64,xmmreg             X64,SSE2,AR1
     CVTSD2SI         reg64,mem                X64,SSE2,AR1
     CVTSD2SS         xmmreg,xmmrm             WILLAMETTE,SSE2
     CVTSI2SD         xmmreg,mem               WILLAMETTE,SSE2,SD,AR1,ND
     CVTSI2SD         xmmreg,rm32              WILLAMETTE,SSE2,SD,AR1
     CVTSI2SD         xmmreg,rm64              X64,SSE2,AR1
     CVTSS2SD         xmmreg,xmmrm             WILLAMETTE,SSE2,SD
     CVTTPD2PI        mmxreg,xmmrm             WILLAMETTE,SSE2,SO
     CVTTPD2DQ        xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     CVTTPS2DQ        xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     CVTTSD2SI        reg32,xmmreg             WILLAMETTE,SSE2,AR1
     CVTTSD2SI        reg32,mem                WILLAMETTE,SSE2,AR1
     CVTTSD2SI        reg64,xmmreg             X64,SSE2,AR1
     CVTTSD2SI        reg64,mem                X64,SSE2,AR1
     DIVPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     DIVSD            xmmreg,xmmrm             WILLAMETTE,SSE2
     MAXPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     MAXSD            xmmreg,xmmrm             WILLAMETTE,SSE2
     MINPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     MINSD            xmmreg,xmmrm             WILLAMETTE,SSE2
     MOVAPD           xmmreg,xmmreg            WILLAMETTE,SSE2
     MOVAPD           xmmreg,xmmreg            WILLAMETTE,SSE2
     MOVAPD           mem,xmmreg               WILLAMETTE,SSE2,SO
     MOVAPD           xmmreg,mem               WILLAMETTE,SSE2,SO
     MOVHPD           mem,xmmreg               WILLAMETTE,SSE2
     MOVHPD           xmmreg,mem               WILLAMETTE,SSE2
     MOVLPD           mem,xmmreg               WILLAMETTE,SSE2
     MOVLPD           xmmreg,mem               WILLAMETTE,SSE2
     MOVMSKPD         reg32,xmmreg             WILLAMETTE,SSE2
     MOVMSKPD         reg64,xmmreg             X64,SSE2
     MOVSD            xmmreg,xmmreg            WILLAMETTE,SSE2
     MOVSD            xmmreg,xmmreg            WILLAMETTE,SSE2
     MOVSD            mem,xmmreg               WILLAMETTE,SSE2
     MOVSD            xmmreg,mem               WILLAMETTE,SSE2
     MOVUPD           xmmreg,xmmreg            WILLAMETTE,SSE2
     MOVUPD           xmmreg,xmmreg            WILLAMETTE,SSE2
     MOVUPD           mem,xmmreg               WILLAMETTE,SSE2,SO
     MOVUPD           xmmreg,mem               WILLAMETTE,SSE2,SO
     MULPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     MULSD            xmmreg,xmmrm             WILLAMETTE,SSE2
     ORPD             xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     SHUFPD           xmmreg,xmmreg,imm        WILLAMETTE,SSE2
     SHUFPD           xmmreg,mem,imm           WILLAMETTE,SSE2
     SQRTPD           xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     SQRTSD           xmmreg,xmmrm             WILLAMETTE,SSE2
     SUBPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     SUBSD            xmmreg,xmmrm             WILLAMETTE,SSE2
     UCOMISD          xmmreg,xmmrm             WILLAMETTE,SSE2
     UNPCKHPD         xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     UNPCKLPD         xmmreg,xmmrm             WILLAMETTE,SSE2,SO
     XORPD            xmmreg,xmmrm             WILLAMETTE,SSE2,SO


File: nasm.info,  Node: Section B.1.12,  Next: Section B.1.13,  Prev: Section B.1.11,  Up: Section B.1

B.1.12. Prescott New Instructions (SSE3)
----------------------------------------

     ADDSUBPD         xmmreg,xmmrm             PRESCOTT,SSE3,SO
     ADDSUBPS         xmmreg,xmmrm             PRESCOTT,SSE3,SO
     HADDPD           xmmreg,xmmrm             PRESCOTT,SSE3,SO
     HADDPS           xmmreg,xmmrm             PRESCOTT,SSE3,SO
     HSUBPD           xmmreg,xmmrm             PRESCOTT,SSE3,SO
     HSUBPS           xmmreg,xmmrm             PRESCOTT,SSE3,SO
     LDDQU            xmmreg,mem               PRESCOTT,SSE3,SO
     MOVDDUP          xmmreg,xmmrm             PRESCOTT,SSE3
     MOVSHDUP         xmmreg,xmmrm             PRESCOTT,SSE3
     MOVSLDUP         xmmreg,xmmrm             PRESCOTT,SSE3


File: nasm.info,  Node: Section B.1.13,  Next: Section B.1.14,  Prev: Section B.1.12,  Up: Section B.1

B.1.13. VMX Instructions
------------------------

     VMCALL                                    VMX
     VMCLEAR          mem                      VMX
     VMLAUNCH                                  VMX
     VMLOAD                                    X64,VMX
     VMMCALL                                   X64,VMX
     VMPTRLD          mem                      VMX
     VMPTRST          mem                      VMX
     VMREAD           rm32,reg32               VMX,NOLONG,SD
     VMREAD           rm64,reg64               X64,VMX
     VMRESUME                                  VMX
     VMRUN                                     X64,VMX
     VMSAVE                                    X64,VMX
     VMWRITE          reg32,rm32               VMX,NOLONG,SD
     VMWRITE          reg64,rm64               X64,VMX
     VMXOFF                                    VMX
     VMXON            mem                      VMX


File: nasm.info,  Node: Section B.1.14,  Next: Section B.1.15,  Prev: Section B.1.13,  Up: Section B.1

B.1.14. Extended Page Tables VMX instructions
---------------------------------------------

     INVEPT           reg32,mem                VMX,SO,NOLONG
     INVEPT           reg64,mem                VMX,SO,LONG
     INVVPID          reg32,mem                VMX,SO,NOLONG
     INVVPID          reg64,mem                VMX,SO,LONG


File: nasm.info,  Node: Section B.1.15,  Next: Section B.1.16,  Prev: Section B.1.14,  Up: Section B.1

B.1.15. Tejas New Instructions (SSSE3)
--------------------------------------

     PABSB            mmxreg,mmxrm             SSSE3,MMX
     PABSB            xmmreg,xmmrm             SSSE3
     PABSW            mmxreg,mmxrm             SSSE3,MMX
     PABSW            xmmreg,xmmrm             SSSE3
     PABSD            mmxreg,mmxrm             SSSE3,MMX
     PABSD            xmmreg,xmmrm             SSSE3
     PALIGNR          mmxreg,mmxrm,imm         SSSE3,MMX
     PALIGNR          xmmreg,xmmrm,imm         SSSE3
     PHADDW           mmxreg,mmxrm             SSSE3,MMX
     PHADDW           xmmreg,xmmrm             SSSE3
     PHADDD           mmxreg,mmxrm             SSSE3,MMX
     PHADDD           xmmreg,xmmrm             SSSE3
     PHADDSW          mmxreg,mmxrm             SSSE3,MMX
     PHADDSW          xmmreg,xmmrm             SSSE3
     PHSUBW           mmxreg,mmxrm             SSSE3,MMX
     PHSUBW           xmmreg,xmmrm             SSSE3
     PHSUBD           mmxreg,mmxrm             SSSE3,MMX
     PHSUBD           xmmreg,xmmrm             SSSE3
     PHSUBSW          mmxreg,mmxrm             SSSE3,MMX
     PHSUBSW          xmmreg,xmmrm             SSSE3
     PMADDUBSW        mmxreg,mmxrm             SSSE3,MMX
     PMADDUBSW        xmmreg,xmmrm             SSSE3
     PMULHRSW         mmxreg,mmxrm             SSSE3,MMX
     PMULHRSW         xmmreg,xmmrm             SSSE3
     PSHUFB           mmxreg,mmxrm             SSSE3,MMX
     PSHUFB           xmmreg,xmmrm             SSSE3
     PSIGNB           mmxreg,mmxrm             SSSE3,MMX
     PSIGNB           xmmreg,xmmrm             SSSE3
     PSIGNW           mmxreg,mmxrm             SSSE3,MMX
     PSIGNW           xmmreg,xmmrm             SSSE3
     PSIGND           mmxreg,mmxrm             SSSE3,MMX
     PSIGND           xmmreg,xmmrm             SSSE3


File: nasm.info,  Node: Section B.1.16,  Next: Section B.1.17,  Prev: Section B.1.15,  Up: Section B.1

B.1.16. AMD SSE4A
-----------------

     EXTRQ            xmmreg,imm,imm           SSE4A,AMD
     EXTRQ            xmmreg,xmmreg            SSE4A,AMD
     INSERTQ          xmmreg,xmmreg,imm,imm    SSE4A,AMD
     INSERTQ          xmmreg,xmmreg            SSE4A,AMD
     MOVNTSD          mem,xmmreg               SSE4A,AMD
     MOVNTSS          mem,xmmreg               SSE4A,AMD,SD


File: nasm.info,  Node: Section B.1.17,  Next: Section B.1.18,  Prev: Section B.1.16,  Up: Section B.1

B.1.17. New instructions in Barcelona
-------------------------------------

     LZCNT            reg16,rm16               P6,AMD
     LZCNT            reg32,rm32               P6,AMD
     LZCNT            reg64,rm64               X64,AMD


File: nasm.info,  Node: Section B.1.18,  Next: Section B.1.19,  Prev: Section B.1.17,  Up: Section B.1

B.1.18. Penryn New Instructions (SSE4.1)
----------------------------------------

     BLENDPD          xmmreg,xmmrm,imm         SSE41
     BLENDPS          xmmreg,xmmrm,imm         SSE41
     BLENDVPD         xmmreg,xmmrm,xmm0        SSE41
     BLENDVPS         xmmreg,xmmrm,xmm0        SSE41
     DPPD             xmmreg,xmmrm,imm         SSE41
     DPPS             xmmreg,xmmrm,imm         SSE41
     EXTRACTPS        rm32,xmmreg,imm          SSE41
     EXTRACTPS        reg64,xmmreg,imm         SSE41,X64
     INSERTPS         xmmreg,xmmrm,imm         SSE41,SD
     MOVNTDQA         xmmreg,mem               SSE41
     MPSADBW          xmmreg,xmmrm,imm         SSE41
     PACKUSDW         xmmreg,xmmrm             SSE41
     PBLENDVB         xmmreg,xmmrm,xmm0        SSE41
     PBLENDW          xmmreg,xmmrm,imm         SSE41
     PCMPEQQ          xmmreg,xmmrm             SSE41
     PEXTRB           reg32,xmmreg,imm         SSE41
     PEXTRB           mem8,xmmreg,imm          SSE41
     PEXTRB           reg64,xmmreg,imm         SSE41,X64
     PEXTRD           rm32,xmmreg,imm          SSE41
     PEXTRQ           rm64,xmmreg,imm          SSE41,X64
     PEXTRW           reg32,xmmreg,imm         SSE41
     PEXTRW           mem16,xmmreg,imm         SSE41
     PEXTRW           reg64,xmmreg,imm         SSE41,X64
     PHMINPOSUW       xmmreg,xmmrm             SSE41
     PINSRB           xmmreg,mem,imm           SSE41
     PINSRB           xmmreg,rm8,imm           SSE41
     PINSRB           xmmreg,reg32,imm         SSE41
     PINSRD           xmmreg,mem,imm           SSE41
     PINSRD           xmmreg,rm32,imm          SSE41
     PINSRQ           xmmreg,mem,imm           SSE41,X64
     PINSRQ           xmmreg,rm64,imm          SSE41,X64
     PMAXSB           xmmreg,xmmrm             SSE41
     PMAXSD           xmmreg,xmmrm             SSE41
     PMAXUD           xmmreg,xmmrm             SSE41
     PMAXUW           xmmreg,xmmrm             SSE41
     PMINSB           xmmreg,xmmrm             SSE41
     PMINSD           xmmreg,xmmrm             SSE41
     PMINUD           xmmreg,xmmrm             SSE41
     PMINUW           xmmreg,xmmrm             SSE41
     PMOVSXBW         xmmreg,xmmrm             SSE41
     PMOVSXBD         xmmreg,xmmrm             SSE41,SD
     PMOVSXBQ         xmmreg,xmmrm             SSE41,SW
     PMOVSXWD         xmmreg,xmmrm             SSE41
     PMOVSXWQ         xmmreg,xmmrm             SSE41,SD
     PMOVSXDQ         xmmreg,xmmrm             SSE41
     PMOVZXBW         xmmreg,xmmrm             SSE41
     PMOVZXBD         xmmreg,xmmrm             SSE41,SD
     PMOVZXBQ         xmmreg,xmmrm             SSE41,SW
     PMOVZXWD         xmmreg,xmmrm             SSE41
     PMOVZXWQ         xmmreg,xmmrm             SSE41,SD
     PMOVZXDQ         xmmreg,xmmrm             SSE41
     PMULDQ           xmmreg,xmmrm             SSE41
     PMULLD           xmmreg,xmmrm             SSE41
     PTEST            xmmreg,xmmrm             SSE41
     ROUNDPD          xmmreg,xmmrm,imm         SSE41
     ROUNDPS          xmmreg,xmmrm,imm         SSE41
     ROUNDSD          xmmreg,xmmrm,imm         SSE41
     ROUNDSS          xmmreg,xmmrm,imm         SSE41


File: nasm.info,  Node: Section B.1.19,  Next: Section B.1.20,  Prev: Section B.1.18,  Up: Section B.1

B.1.19. Nehalem New Instructions (SSE4.2)
-----------------------------------------

     CRC32            reg32,rm8                SSE42
     CRC32            reg32,rm16               SSE42
     CRC32            reg32,rm32               SSE42
     CRC32            reg64,rm8                SSE42,X64
     CRC32            reg64,rm64               SSE42,X64
     PCMPESTRI        xmmreg,xmmrm,imm         SSE42
     PCMPESTRM        xmmreg,xmmrm,imm         SSE42
     PCMPISTRI        xmmreg,xmmrm,imm         SSE42
     PCMPISTRM        xmmreg,xmmrm,imm         SSE42
     PCMPGTQ          xmmreg,xmmrm             SSE42
     POPCNT           reg16,rm16               NEHALEM,SW
     POPCNT           reg32,rm32               NEHALEM,SD
     POPCNT           reg64,rm64               NEHALEM,X64


File: nasm.info,  Node: Section B.1.20,  Next: Section B.1.21,  Prev: Section B.1.19,  Up: Section B.1

B.1.20. Intel SMX
-----------------

     GETSEC                                    KATMAI


File: nasm.info,  Node: Section B.1.21,  Next: Section B.1.22,  Prev: Section B.1.20,  Up: Section B.1

B.1.21. Geode (Cyrix) 3DNow! additions
--------------------------------------

     PFRCPV           mmxreg,mmxrm             PENT,3DNOW,CYRIX
     PFRSQRTV         mmxreg,mmxrm             PENT,3DNOW,CYRIX


File: nasm.info,  Node: Section B.1.22,  Next: Section B.1.23,  Prev: Section B.1.21,  Up: Section B.1

B.1.22. Intel new instructions in ???
-------------------------------------

     MOVBE            reg16,mem16              NEHALEM
     MOVBE            reg32,mem32              NEHALEM
     MOVBE            reg64,mem64              NEHALEM
     MOVBE            mem16,reg16              NEHALEM
     MOVBE            mem32,reg32              NEHALEM
     MOVBE            mem64,reg64              NEHALEM


File: nasm.info,  Node: Section B.1.23,  Next: Section B.1.24,  Prev: Section B.1.22,  Up: Section B.1

B.1.23. Intel AES instructions
------------------------------

     AESENC           xmmreg,xmmrm128          SSE,WESTMERE
     AESENCLAST       xmmreg,xmmrm128          SSE,WESTMERE
     AESDEC           xmmreg,xmmrm128          SSE,WESTMERE
     AESDECLAST       xmmreg,xmmrm128          SSE,WESTMERE
     AESIMC           xmmreg,xmmrm128          SSE,WESTMERE
     AESKEYGENASSIST  xmmreg,xmmrm128,imm8     SSE,WESTMERE


File: nasm.info,  Node: Section B.1.24,  Next: Section B.1.25,  Prev: Section B.1.23,  Up: Section B.1

B.1.24. Intel AVX AES instructions
----------------------------------

     VAESENC          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VAESENCLAST      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VAESDEC          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VAESDECLAST      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VAESIMC          xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VAESKEYGENASSIST xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE


File: nasm.info,  Node: Section B.1.25,  Next: Section B.1.26,  Prev: Section B.1.24,  Up: Section B.1

B.1.25. Intel AVX instructions
------------------------------

     VADDPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VADDPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VADDPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VADDPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VADDSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VADDSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VADDSUBPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VADDSUBPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VADDSUBPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VADDSUBPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VANDPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VANDPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VANDPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VANDPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VANDNPD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VANDNPD          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VANDNPS          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VANDNPS          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VBLENDPD         xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE
     VBLENDPD         ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE
     VBLENDPS         xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE
     VBLENDPS         ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE
     VBLENDVPD        xmmreg,xmmreg,xmmrm128,xmmreg AVX,SANDYBRIDGE
     VBLENDVPD        xmmreg,xmmrm128,xmm0     AVX,SANDYBRIDGE
     VBLENDVPD        ymmreg,ymmreg,ymmrm256,ymmreg AVX,SANDYBRIDGE
     VBLENDVPD        ymmreg,ymmrm256,ymm0     AVX,SANDYBRIDGE
     VBLENDVPS        xmmreg,xmmreg,xmmrm128,xmmreg AVX,SANDYBRIDGE
     VBLENDVPS        xmmreg,xmmrm128,xmm0     AVX,SANDYBRIDGE
     VBLENDVPS        ymmreg,ymmreg,ymmrm256,ymmreg AVX,SANDYBRIDGE
     VBLENDVPD        ymmreg,ymmrm256,ymm0     AVX,SANDYBRIDGE
     VBROADCASTSS     xmmreg,mem32             AVX,SANDYBRIDGE
     VBROADCASTSS     ymmreg,mem32             AVX,SANDYBRIDGE
     VBROADCASTSD     ymmreg,mem64             AVX,SANDYBRIDGE
     VBROADCASTF128   ymmreg,mem128            AVX,SANDYBRIDGE
     VCMPEQPD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPEQPD         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPLTPD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPLTPD         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPLEPD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPLEPD         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPUNORDPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPUNORDPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNEQPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNEQPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNLTPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNLTPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNLEPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNLEPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPORDPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPORDPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPEQ_UQPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPEQ_UQPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNGEPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNGEPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNGTPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNGTPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPFALSEPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPFALSEPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNEQ_OQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNEQ_OQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPGEPD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPGEPD         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPGTPD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPGTPD         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPTRUEPD       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPTRUEPD       ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPEQ_OSPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPEQ_OSPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPLT_OQPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPLT_OQPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPLE_OQPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPLE_OQPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPUNORD_SPD    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPUNORD_SPD    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNEQ_USPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNEQ_USPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNLT_UQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNLT_UQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNLE_UQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNLE_UQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPORD_SPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPORD_SPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPEQ_USPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPEQ_USPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNGE_UQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNGE_UQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNGT_UQPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNGT_UQPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPFALSE_OSPD   xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPFALSE_OSPD   ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNEQ_OSPD     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNEQ_OSPD     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPGE_OQPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPGE_OQPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPGT_OQPD      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPGT_OQPD      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPTRUE_USPD    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPTRUE_USPD    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPPD           xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE
     VCMPPD           ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE
     VCMPEQPS         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPEQPS         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPLTPS         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPLTPS         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPLEPS         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPLEPS         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPUNORDPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPUNORDPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNEQPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNEQPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNLTPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNLTPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNLEPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNLEPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPORDPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPORDPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPEQ_UQPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPEQ_UQPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNGEPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNGEPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNGTPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNGTPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPFALSEPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPFALSEPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNEQ_OQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNEQ_OQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPGEPS         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPGEPS         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPGTPS         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPGTPS         ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPTRUEPS       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPTRUEPS       ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPEQ_OSPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPEQ_OSPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPLT_OQPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPLT_OQPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPLE_OQPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPLE_OQPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPUNORD_SPS    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPUNORD_SPS    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNEQ_USPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNEQ_USPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNLT_UQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNLT_UQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNLE_UQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNLE_UQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPORD_SPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPORD_SPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPEQ_USPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPEQ_USPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNGE_UQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNGE_UQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNGT_UQPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNGT_UQPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPFALSE_OSPS   xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPFALSE_OSPS   ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPNEQ_OSPS     xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPNEQ_OSPS     ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPGE_OQPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPGE_OQPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPGT_OQPS      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPGT_OQPS      ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPTRUE_USPS    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VCMPTRUE_USPS    ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VCMPPS           xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE
     VCMPPS           ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE
     VCMPEQSD         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPLTSD         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPLESD         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPUNORDSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPNEQSD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPNLTSD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPNLESD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPORDSD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPEQ_UQSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPNGESD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPNGTSD        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPFALSESD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPNEQ_OQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPGESD         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPGTSD         xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPTRUESD       xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPEQ_OSSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPLT_OQSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPLE_OQSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPUNORD_SSD    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPNEQ_USSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPNLT_UQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPNLE_UQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPORD_SSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPEQ_USSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPNGE_UQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPNGT_UQSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPFALSE_OSSD   xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPNEQ_OSSD     xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPGE_OQSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPGT_OQSD      xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPTRUE_USSD    xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCMPSD           xmmreg,xmmreg*,xmmrm64,imm8 AVX,SANDYBRIDGE
     VCMPEQSS         xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPLTSS         xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPLESS         xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPUNORDSS      xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPNEQSS        xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPNLTSS        xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPNLESS        xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPORDSS        xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPEQ_UQSS      xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPNGESS        xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPNGTSS        xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPFALSESS      xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPNEQ_OQSS     xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPGESS         xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPGTSS         xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPTRUESS       xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPEQ_OSSS      xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPLT_OQSS      xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPLE_OQSS      xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPUNORD_SSS    xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPNEQ_USSS     xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPNLT_UQSS     xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPNLE_UQSS     xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPORD_SSS      xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPEQ_USSS      xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPNGE_UQSS     xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPNGT_UQSS     xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPFALSE_OSSS   xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPNEQ_OSSS     xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPGE_OQSS      xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPGT_OQSS      xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPTRUE_USSS    xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCMPSS           xmmreg,xmmreg*,xmmrm32,imm8 AVX,SANDYBRIDGE
     VCOMISD          xmmreg,xmmrm64           AVX,SANDYBRIDGE
     VCOMISS          xmmreg,xmmrm32           AVX,SANDYBRIDGE
     VCVTDQ2PD        xmmreg,xmmrm64           AVX,SANDYBRIDGE
     VCVTDQ2PD        ymmreg,xmmrm128          AVX,SANDYBRIDGE
     VCVTDQ2PS        xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VCVTDQ2PS        ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VCVTPD2DQ        xmmreg,xmmreg            AVX,SANDYBRIDGE
     VCVTPD2DQ        xmmreg,mem128            AVX,SANDYBRIDGE,SO
     VCVTPD2DQ        xmmreg,ymmreg            AVX,SANDYBRIDGE
     VCVTPD2DQ        xmmreg,mem256            AVX,SANDYBRIDGE,SY
     VCVTPD2PS        xmmreg,xmmreg            AVX,SANDYBRIDGE
     VCVTPD2PS        xmmreg,mem128            AVX,SANDYBRIDGE,SO
     VCVTPD2PS        xmmreg,ymmreg            AVX,SANDYBRIDGE
     VCVTPD2PS        xmmreg,mem256            AVX,SANDYBRIDGE,SY
     VCVTPS2DQ        xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VCVTPS2DQ        ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VCVTPS2PD        xmmreg,xmmrm64           AVX,SANDYBRIDGE
     VCVTPS2PD        ymmreg,xmmrm128          AVX,SANDYBRIDGE
     VCVTSD2SI        reg32,xmmrm64            AVX,SANDYBRIDGE
     VCVTSD2SI        reg64,xmmrm64            AVX,SANDYBRIDGE,LONG
     VCVTSD2SS        xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VCVTSI2SD        xmmreg,xmmreg*,rm32      AVX,SANDYBRIDGE,SD
     VCVTSI2SD        xmmreg,xmmreg*,mem32     AVX,SANDYBRIDGE,ND,SD
     VCVTSI2SD        xmmreg,xmmreg*,rm64      AVX,SANDYBRIDGE,LONG
     VCVTSI2SS        xmmreg,xmmreg*,rm32      AVX,SANDYBRIDGE,SD
     VCVTSI2SS        xmmreg,xmmreg*,mem32     AVX,SANDYBRIDGE,ND,SD
     VCVTSI2SS        xmmreg,xmmreg*,rm64      AVX,SANDYBRIDGE,LONG
     VCVTSS2SD        xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VCVTSS2SI        reg32,xmmrm32            AVX,SANDYBRIDGE
     VCVTSS2SI        reg64,xmmrm32            AVX,SANDYBRIDGE,LONG
     VCVTTPD2DQ       xmmreg,xmmreg            AVX,SANDYBRIDGE
     VCVTTPD2DQ       xmmreg,mem128            AVX,SANDYBRIDGE,SO
     VCVTTPD2DQ       xmmreg,ymmreg            AVX,SANDYBRIDGE
     VCVTTPD2DQ       xmmreg,mem256            AVX,SANDYBRIDGE,SY
     VCVTTPS2DQ       xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VCVTTPS2DQ       ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VCVTTSD2SI       reg32,xmmrm64            AVX,SANDYBRIDGE
     VCVTTSD2SI       reg64,xmmrm64            AVX,SANDYBRIDGE,LONG
     VCVTTSS2SI       reg32,xmmrm32            AVX,SANDYBRIDGE
     VCVTTSS2SI       reg64,xmmrm32            AVX,SANDYBRIDGE,LONG
     VDIVPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VDIVPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VDIVPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VDIVPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VDIVSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VDIVSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VDPPD            xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE
     VDPPS            xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE
     VDPPS            ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE
     VEXTRACTF128     xmmrm128,xmmreg,imm8     AVX,SANDYBRIDGE
     VEXTRACTPS       rm32,xmmreg,imm8         AVX,SANDYBRIDGE
     VHADDPD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VHADDPD          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VHADDPS          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VHADDPS          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VHSUBPD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VHSUBPD          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VHSUBPS          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VHSUBPS          ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VINSERTF128      ymmreg,ymmreg,xmmrm128,imm8 AVX,SANDYBRIDGE
     VINSERTPS        xmmreg,xmmreg*,xmmrm32,imm8 AVX,SANDYBRIDGE
     VLDDQU           xmmreg,mem128            AVX,SANDYBRIDGE
     VLDQQU           ymmreg,mem256            AVX,SANDYBRIDGE
     VLDDQU           ymmreg,mem256            AVX,SANDYBRIDGE
     VLDMXCSR         mem32                    AVX,SANDYBRIDGE
     VMASKMOVDQU      xmmreg,xmmreg            AVX,SANDYBRIDGE
     VMASKMOVPS       xmmreg,xmmreg,mem128     AVX,SANDYBRIDGE
     VMASKMOVPS       ymmreg,ymmreg,mem256     AVX,SANDYBRIDGE
     VMASKMOVPS       mem128,xmmreg,xmmreg     AVX,SANDYBRIDGE,SO
     VMASKMOVPS       mem256,xmmreg,xmmreg     AVX,SANDYBRIDGE,SY
     VMASKMOVPD       xmmreg,xmmreg,mem128     AVX,SANDYBRIDGE
     VMASKMOVPD       ymmreg,ymmreg,mem256     AVX,SANDYBRIDGE
     VMASKMOVPD       mem128,xmmreg,xmmreg     AVX,SANDYBRIDGE
     VMASKMOVPD       mem256,ymmreg,ymmreg     AVX,SANDYBRIDGE
     VMAXPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VMAXPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VMAXPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VMAXPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VMAXSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VMAXSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VMINPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VMINPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VMINPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VMINPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VMINSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VMINSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VMOVAPD          xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VMOVAPD          xmmrm128,xmmreg          AVX,SANDYBRIDGE
     VMOVAPD          ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VMOVAPD          ymmrm256,ymmreg          AVX,SANDYBRIDGE
     VMOVAPS          xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VMOVAPS          xmmrm128,xmmreg          AVX,SANDYBRIDGE
     VMOVAPS          ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VMOVAPS          ymmrm256,ymmreg          AVX,SANDYBRIDGE
     VMOVQ            xmmreg,xmmrm64           AVX,SANDYBRIDGE
     VMOVQ            xmmrm64,xmmreg           AVX,SANDYBRIDGE
     VMOVQ            xmmreg,rm64              AVX,SANDYBRIDGE,LONG
     VMOVQ            rm64,xmmreg              AVX,SANDYBRIDGE,LONG
     VMOVD            xmmreg,rm32              AVX,SANDYBRIDGE
     VMOVD            rm32,xmmreg              AVX,SANDYBRIDGE
     VMOVDDUP         xmmreg,xmmrm64           AVX,SANDYBRIDGE
     VMOVDDUP         ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VMOVDQA          xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VMOVDQA          xmmrm128,xmmreg          AVX,SANDYBRIDGE
     VMOVQQA          ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VMOVQQA          ymmrm256,ymmreg          AVX,SANDYBRIDGE
     VMOVDQA          ymmreg,ymmrm             AVX,SANDYBRIDGE
     VMOVDQA          ymmrm256,ymmreg          AVX,SANDYBRIDGE
     VMOVDQU          xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VMOVDQU          xmmrm128,xmmreg          AVX,SANDYBRIDGE
     VMOVQQU          ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VMOVQQU          ymmrm256,ymmreg          AVX,SANDYBRIDGE
     VMOVDQU          ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VMOVDQU          ymmrm256,ymmreg          AVX,SANDYBRIDGE
     VMOVHLPS         xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE
     VMOVHPD          xmmreg,xmmreg*,mem64     AVX,SANDYBRIDGE
     VMOVHPD          mem64,xmmreg             AVX,SANDYBRIDGE
     VMOVHPS          xmmreg,xmmreg*,mem64     AVX,SANDYBRIDGE
     VMOVHPS          mem64,xmmreg             AVX,SANDYBRIDGE
     VMOVLHPS         xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE
     VMOVLPD          xmmreg,xmmreg*,mem64     AVX,SANDYBRIDGE
     VMOVLPD          mem64,xmmreg             AVX,SANDYBRIDGE
     VMOVLPS          xmmreg,xmmreg*,mem64     AVX,SANDYBRIDGE
     VMOVLPS          mem64,xmmreg             AVX,SANDYBRIDGE
     VMOVMSKPD        reg64,xmmreg             AVX,SANDYBRIDGE,LONG
     VMOVMSKPD        reg32,xmmreg             AVX,SANDYBRIDGE
     VMOVMSKPD        reg64,ymmreg             AVX,SANDYBRIDGE,LONG
     VMOVMSKPD        reg32,ymmreg             AVX,SANDYBRIDGE
     VMOVMSKPS        reg64,xmmreg             AVX,SANDYBRIDGE,LONG
     VMOVMSKPS        reg32,xmmreg             AVX,SANDYBRIDGE
     VMOVMSKPS        reg64,ymmreg             AVX,SANDYBRIDGE,LONG
     VMOVMSKPS        reg32,ymmreg             AVX,SANDYBRIDGE
     VMOVNTDQ         mem128,xmmreg            AVX,SANDYBRIDGE
     VMOVNTQQ         mem256,ymmreg            AVX,SANDYBRIDGE
     VMOVNTDQ         mem256,ymmreg            AVX,SANDYBRIDGE
     VMOVNTDQA        xmmreg,mem128            AVX,SANDYBRIDGE
     VMOVNTPD         mem128,xmmreg            AVX,SANDYBRIDGE
     VMOVNTPD         mem256,ymmreg            AVX,SANDYBRIDGE
     VMOVNTPS         mem128,xmmreg            AVX,SANDYBRIDGE
     VMOVNTPS         mem128,ymmreg            AVX,SANDYBRIDGE
     VMOVSD           xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE
     VMOVSD           xmmreg,mem64             AVX,SANDYBRIDGE
     VMOVSD           xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE
     VMOVSD           mem64,xmmreg             AVX,SANDYBRIDGE
     VMOVSHDUP        xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VMOVSHDUP        ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VMOVSLDUP        xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VMOVSLDUP        ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VMOVSS           xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE
     VMOVSS           xmmreg,mem64             AVX,SANDYBRIDGE
     VMOVSS           xmmreg,xmmreg*,xmmreg    AVX,SANDYBRIDGE
     VMOVSS           mem64,xmmreg             AVX,SANDYBRIDGE
     VMOVUPD          xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VMOVUPD          xmmrm128,xmmreg          AVX,SANDYBRIDGE
     VMOVUPD          ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VMOVUPD          ymmrm256,ymmreg          AVX,SANDYBRIDGE
     VMOVUPS          xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VMOVUPS          xmmrm128,xmmreg          AVX,SANDYBRIDGE
     VMOVUPS          ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VMOVUPS          ymmrm256,ymmreg          AVX,SANDYBRIDGE
     VMPSADBW         xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE
     VMULPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VMULPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VMULPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VMULPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VMULSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VMULSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VORPD            xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VORPD            ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VORPS            xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VORPS            ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VPABSB           xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VPABSW           xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VPABSD           xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VPACKSSWB        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPACKSSDW        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPACKUSWB        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPACKUSDW        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPADDB           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPADDW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPADDD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPADDQ           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPADDSB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPADDSW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPADDUSB         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPADDUSW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPALIGNR         xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE
     VPAND            xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPANDN           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPAVGB           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPAVGW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPBLENDVB        xmmreg,xmmreg*,xmmrm128,xmmreg AVX,SANDYBRIDGE
     VPBLENDW         xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE
     VPCMPESTRI       xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE
     VPCMPESTRM       xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE
     VPCMPISTRI       xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE
     VPCMPISTRM       xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE
     VPCMPEQB         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPCMPEQW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPCMPEQD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPCMPEQQ         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPCMPGTB         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPCMPGTW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPCMPGTD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPCMPGTQ         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPERMILPD        xmmreg,xmmreg,xmmrm128   AVX,SANDYBRIDGE
     VPERMILPD        ymmreg,ymmreg,ymmrm256   AVX,SANDYBRIDGE
     VPERMILPD        xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE
     VPERMILPD        ymmreg,ymmrm256,imm8     AVX,SANDYBRIDGE
     VPERMILTD2PD     xmmreg,xmmreg,xmmrm128,xmmreg AVX,SANDYBRIDGE
     VPERMILTD2PD     xmmreg,xmmreg,xmmreg,xmmrm128 AVX,SANDYBRIDGE
     VPERMILTD2PD     ymmreg,ymmreg,ymmrm256,ymmreg AVX,SANDYBRIDGE
     VPERMILTD2PD     ymmreg,ymmreg,ymmreg,ymmrm256 AVX,SANDYBRIDGE
     VPERMILMO2PD     xmmreg,xmmreg,xmmrm128,xmmreg AVX,SANDYBRIDGE
     VPERMILMO2PD     xmmreg,xmmreg,xmmreg,xmmrm128 AVX,SANDYBRIDGE
     VPERMILMO2PD     ymmreg,ymmreg,ymmrm256,ymmreg AVX,SANDYBRIDGE
     VPERMILMO2PD     ymmreg,ymmreg,ymmreg,ymmrm256 AVX,SANDYBRIDGE
     VPERMILMZ2PD     xmmreg,xmmreg,xmmrm128,xmmreg AVX,SANDYBRIDGE
     VPERMILMZ2PD     xmmreg,xmmreg,xmmreg,xmmrm128 AVX,SANDYBRIDGE
     VPERMILMZ2PD     ymmreg,ymmreg,ymmrm256,ymmreg AVX,SANDYBRIDGE
     VPERMILMZ2PD     ymmreg,ymmreg,ymmreg,ymmrm256 AVX,SANDYBRIDGE
     VPERMIL2PD       xmmreg,xmmreg,xmmrm128,xmmreg,imm8 AVX,SANDYBRIDGE
     VPERMIL2PD       xmmreg,xmmreg,xmmreg,xmmrm128,imm8 AVX,SANDYBRIDGE
     VPERMIL2PD       ymmreg,ymmreg,ymmrm256,ymmreg,imm8 AVX,SANDYBRIDGE
     VPERMIL2PD       ymmreg,ymmreg,ymmreg,ymmrm256,imm8 AVX,SANDYBRIDGE
     VPERMILPS        xmmreg,xmmreg,xmmrm128   AVX,SANDYBRIDGE
     VPERMILPS        ymmreg,ymmreg,ymmrm256   AVX,SANDYBRIDGE
     VPERMILPS        xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE
     VPERMILPS        ymmreg,ymmrm256,imm8     AVX,SANDYBRIDGE
     VPERMILTD2PS     xmmreg,xmmreg,xmmrm128,xmmreg AVX,SANDYBRIDGE
     VPERMILTD2PS     xmmreg,xmmreg,xmmreg,xmmrm128 AVX,SANDYBRIDGE
     VPERMILTD2PS     ymmreg,ymmreg,ymmrm256,ymmreg AVX,SANDYBRIDGE
     VPERMILTD2PS     ymmreg,ymmreg,ymmreg,ymmrm256 AVX,SANDYBRIDGE
     VPERMILMO2PS     xmmreg,xmmreg,xmmrm128,xmmreg AVX,SANDYBRIDGE
     VPERMILMO2PS     xmmreg,xmmreg,xmmreg,xmmrm128 AVX,SANDYBRIDGE
     VPERMILMO2PS     ymmreg,ymmreg,ymmrm256,ymmreg AVX,SANDYBRIDGE
     VPERMILMO2PS     ymmreg,ymmreg,ymmreg,ymmrm256 AVX,SANDYBRIDGE
     VPERMILMZ2PS     xmmreg,xmmreg,xmmrm128,xmmreg AVX,SANDYBRIDGE
     VPERMILMZ2PS     xmmreg,xmmreg,xmmreg,xmmrm128 AVX,SANDYBRIDGE
     VPERMILMZ2PS     ymmreg,ymmreg,ymmrm256,ymmreg AVX,SANDYBRIDGE
     VPERMILMZ2PS     ymmreg,ymmreg,ymmreg,ymmrm256 AVX,SANDYBRIDGE
     VPERMIL2PS       xmmreg,xmmreg,xmmrm128,xmmreg,imm8 AVX,SANDYBRIDGE
     VPERMIL2PS       xmmreg,xmmreg,xmmreg,xmmrm128,imm8 AVX,SANDYBRIDGE
     VPERMIL2PS       ymmreg,ymmreg,ymmrm256,ymmreg,imm8 AVX,SANDYBRIDGE
     VPERMIL2PS       ymmreg,ymmreg,ymmreg,ymmrm256,imm8 AVX,SANDYBRIDGE
     VPERM2F128       ymmreg,ymmreg,ymmrm256,imm8 AVX,SANDYBRIDGE
     VPEXTRB          reg64,xmmreg,imm8        AVX,SANDYBRIDGE,LONG
     VPEXTRB          reg32,xmmreg,imm8        AVX,SANDYBRIDGE
     VPEXTRB          mem8,xmmreg,imm8         AVX,SANDYBRIDGE
     VPEXTRW          reg64,xmmreg,imm8        AVX,SANDYBRIDGE,LONG
     VPEXTRW          reg32,xmmreg,imm8        AVX,SANDYBRIDGE
     VPEXTRW          mem16,xmmreg,imm8        AVX,SANDYBRIDGE
     VPEXTRW          reg64,xmmreg,imm8        AVX,SANDYBRIDGE,LONG
     VPEXTRW          reg32,xmmreg,imm8        AVX,SANDYBRIDGE
     VPEXTRW          mem16,xmmreg,imm8        AVX,SANDYBRIDGE
     VPEXTRD          reg64,xmmreg,imm8        AVX,SANDYBRIDGE,LONG
     VPEXTRD          rm32,xmmreg,imm8         AVX,SANDYBRIDGE
     VPEXTRQ          rm64,xmmreg,imm8         AVX,SANDYBRIDGE,LONG
     VPHADDW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPHADDD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPHADDSW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPHMINPOSUW      xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VPHSUBW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPHSUBD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPHSUBSW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPINSRB          xmmreg,xmmreg*,mem8,imm8 AVX,SANDYBRIDGE
     VPINSRB          xmmreg,xmmreg*,rm8,imm8  AVX,SANDYBRIDGE
     VPINSRB          xmmreg,xmmreg*,reg32,imm8 AVX,SANDYBRIDGE
     VPINSRW          xmmreg,xmmreg*,mem16,imm8 AVX,SANDYBRIDGE
     VPINSRW          xmmreg,xmmreg*,rm16,imm8 AVX,SANDYBRIDGE
     VPINSRW          xmmreg,xmmreg*,reg32,imm8 AVX,SANDYBRIDGE
     VPINSRD          xmmreg,xmmreg*,mem32,imm8 AVX,SANDYBRIDGE
     VPINSRD          xmmreg,xmmreg*,rm32,imm8 AVX,SANDYBRIDGE
     VPINSRQ          xmmreg,xmmreg*,mem64,imm8 AVX,SANDYBRIDGE,LONG
     VPINSRQ          xmmreg,xmmreg*,rm64,imm8 AVX,SANDYBRIDGE,LONG
     VPMADDWD         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMADDUBSW       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMAXSB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMAXSW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMAXSD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMAXUB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMAXUW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMAXUD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMINSB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMINSW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMINSD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMINUB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMINUW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMINUD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMOVMSKB        reg64,xmmreg             AVX,SANDYBRIDGE,LONG
     VPMOVMSKB        reg32,xmmreg             AVX,SANDYBRIDGE
     VPMOVSXBW        xmmreg,xmmrm64           AVX,SANDYBRIDGE
     VPMOVSXBD        xmmreg,xmmrm32           AVX,SANDYBRIDGE
     VPMOVSXBQ        xmmreg,xmmrm16           AVX,SANDYBRIDGE
     VPMOVSXWD        xmmreg,xmmrm64           AVX,SANDYBRIDGE
     VPMOVSXWQ        xmmreg,xmmrm32           AVX,SANDYBRIDGE
     VPMOVSXDQ        xmmreg,xmmrm64           AVX,SANDYBRIDGE
     VPMOVZXBW        xmmreg,xmmrm64           AVX,SANDYBRIDGE
     VPMOVZXBD        xmmreg,xmmrm32           AVX,SANDYBRIDGE
     VPMOVZXBQ        xmmreg,xmmrm16           AVX,SANDYBRIDGE
     VPMOVZXWD        xmmreg,xmmrm64           AVX,SANDYBRIDGE
     VPMOVZXWQ        xmmreg,xmmrm32           AVX,SANDYBRIDGE
     VPMOVZXDQ        xmmreg,xmmrm64           AVX,SANDYBRIDGE
     VPMULHUW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMULHRSW        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMULHW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMULLW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMULLD          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMULUDQ         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPMULDQ          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPOR             xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSADBW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSHUFB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSHUFD          xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE
     VPSHUFHW         xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE
     VPSHUFLW         xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE
     VPSIGNB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSIGNW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSIGND          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSLLDQ          xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE
     VPSRLDQ          xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE
     VPSLLW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSLLW           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE
     VPSLLD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSLLD           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE
     VPSLLQ           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSLLQ           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE
     VPSRAW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSRAW           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE
     VPSRAD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSRAD           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE
     VPSRLW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSRLW           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE
     VPSRLD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSRLD           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE
     VPSRLQ           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSRLQ           xmmreg,xmmreg*,imm8      AVX,SANDYBRIDGE
     VPTEST           xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VPTEST           ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VPSUBB           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSUBW           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSUBD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSUBQ           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSUBSB          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSUBSW          xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSUBUSB         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPSUBUSW         xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPUNPCKHBW       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPUNPCKHWD       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPUNPCKHDQ       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPUNPCKHQDQ      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPUNPCKLBW       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPUNPCKLWD       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPUNPCKLDQ       xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPUNPCKLQDQ      xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPXOR            xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VRCPPS           xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VRCPPS           ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VRCPSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VRSQRTPS         xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VRSQRTPS         ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VRSQRTSS         xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VROUNDPD         xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE
     VROUNDPD         ymmreg,ymmrm256,imm8     AVX,SANDYBRIDGE
     VROUNDPS         xmmreg,xmmrm128,imm8     AVX,SANDYBRIDGE
     VROUNDPS         ymmreg,ymmrm256,imm8     AVX,SANDYBRIDGE
     VROUNDSD         xmmreg,xmmreg*,xmmrm64,imm8 AVX,SANDYBRIDGE
     VROUNDSS         xmmreg,xmmreg*,xmmrm32,imm8 AVX,SANDYBRIDGE
     VSHUFPD          xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE
     VSHUFPD          ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE
     VSHUFPS          xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE
     VSHUFPS          ymmreg,ymmreg*,ymmrm256,imm8 AVX,SANDYBRIDGE
     VSQRTPD          xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VSQRTPD          ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VSQRTPS          xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VSQRTPS          ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VSQRTSD          xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VSQRTSS          xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VSTMXCSR         mem32                    AVX,SANDYBRIDGE
     VSUBPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VSUBPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VSUBPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VSUBPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VSUBSD           xmmreg,xmmreg*,xmmrm64   AVX,SANDYBRIDGE
     VSUBSS           xmmreg,xmmreg*,xmmrm32   AVX,SANDYBRIDGE
     VTESTPS          xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VTESTPS          ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VTESTPD          xmmreg,xmmrm128          AVX,SANDYBRIDGE
     VTESTPD          ymmreg,ymmrm256          AVX,SANDYBRIDGE
     VUCOMISD         xmmreg,xmmrm64           AVX,SANDYBRIDGE
     VUCOMISS         xmmreg,xmmrm32           AVX,SANDYBRIDGE
     VUNPCKHPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VUNPCKHPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VUNPCKHPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VUNPCKHPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VUNPCKLPD        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VUNPCKLPD        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VUNPCKLPS        xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VUNPCKLPS        ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VXORPD           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VXORPD           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VXORPS           xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VXORPS           ymmreg,ymmreg*,ymmrm256  AVX,SANDYBRIDGE
     VZEROALL                                  AVX,SANDYBRIDGE
     VZEROUPPER                                AVX,SANDYBRIDGE


File: nasm.info,  Node: Section B.1.26,  Next: Section B.1.27,  Prev: Section B.1.25,  Up: Section B.1

B.1.26. Intel Carry-Less Multiplication instructions (CLMUL)
------------------------------------------------------------

     PCLMULLQLQDQ     xmmreg,xmmrm128          SSE,WESTMERE
     PCLMULHQLQDQ     xmmreg,xmmrm128          SSE,WESTMERE
     PCLMULLQHQDQ     xmmreg,xmmrm128          SSE,WESTMERE
     PCLMULHQHQDQ     xmmreg,xmmrm128          SSE,WESTMERE
     PCLMULQDQ        xmmreg,xmmrm128,imm8     SSE,WESTMERE


File: nasm.info,  Node: Section B.1.27,  Next: Section B.1.28,  Prev: Section B.1.26,  Up: Section B.1

B.1.27. Intel AVX Carry-Less Multiplication instructions (CLMUL)
----------------------------------------------------------------

     VPCLMULLQLQDQ    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPCLMULHQLQDQ    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPCLMULLQHQDQ    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPCLMULHQHQDQ    xmmreg,xmmreg*,xmmrm128  AVX,SANDYBRIDGE
     VPCLMULQDQ       xmmreg,xmmreg*,xmmrm128,imm8 AVX,SANDYBRIDGE


File: nasm.info,  Node: Section B.1.28,  Next: Section B.1.29,  Prev: Section B.1.27,  Up: Section B.1

B.1.28. Intel Fused Multiply-Add instructions (FMA)
---------------------------------------------------

     VFMADD132PS      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADD132PS      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADD132PD      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADD132PD      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADD312PS      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADD312PS      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADD312PD      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADD312PD      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADD213PS      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADD213PS      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADD213PD      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADD213PD      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADD123PS      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADD123PS      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADD123PD      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADD123PD      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADD231PS      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADD231PS      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADD231PD      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADD231PD      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADD321PS      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADD321PS      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADD321PD      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADD321PD      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADDSUB132PS   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADDSUB132PS   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADDSUB132PD   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADDSUB132PD   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADDSUB312PS   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADDSUB312PS   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADDSUB312PD   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADDSUB312PD   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADDSUB213PS   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADDSUB213PS   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADDSUB213PD   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADDSUB213PD   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADDSUB123PS   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADDSUB123PS   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADDSUB123PD   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADDSUB123PD   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADDSUB231PS   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADDSUB231PS   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADDSUB231PD   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADDSUB231PD   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADDSUB321PS   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADDSUB321PS   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADDSUB321PD   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMADDSUB321PD   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUB132PS      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUB132PS      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUB132PD      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUB132PD      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUB312PS      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUB312PS      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUB312PD      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUB312PD      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUB213PS      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUB213PS      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUB213PD      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUB213PD      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUB123PS      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUB123PS      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUB123PD      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUB123PD      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUB231PS      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUB231PS      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUB231PD      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUB231PD      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUB321PS      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUB321PS      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUB321PD      xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUB321PD      ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUBADD132PS   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUBADD132PS   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUBADD132PD   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUBADD132PD   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUBADD312PS   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUBADD312PS   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUBADD312PD   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUBADD312PD   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUBADD213PS   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUBADD213PS   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUBADD213PD   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUBADD213PD   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUBADD123PS   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUBADD123PS   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUBADD123PD   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUBADD123PD   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUBADD231PS   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUBADD231PS   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUBADD231PD   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUBADD231PD   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUBADD321PS   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUBADD321PS   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMSUBADD321PD   xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFMSUBADD321PD   ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMADD132PS     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMADD132PS     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMADD132PD     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMADD132PD     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMADD312PS     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMADD312PS     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMADD312PD     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMADD312PD     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMADD213PS     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMADD213PS     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMADD213PD     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMADD213PD     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMADD123PS     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMADD123PS     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMADD123PD     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMADD123PD     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMADD231PS     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMADD231PS     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMADD231PD     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMADD231PD     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMADD321PS     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMADD321PS     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMADD321PD     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMADD321PD     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMSUB132PS     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMSUB132PS     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMSUB132PD     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMSUB132PD     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMSUB312PS     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMSUB312PS     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMSUB312PD     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMSUB312PD     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMSUB213PS     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMSUB213PS     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMSUB213PD     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMSUB213PD     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMSUB123PS     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMSUB123PS     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMSUB123PD     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMSUB123PD     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMSUB231PS     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMSUB231PS     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMSUB231PD     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMSUB231PD     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMSUB321PS     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMSUB321PS     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFNMSUB321PD     xmmreg,xmmreg,xmmrm128   FMA,FUTURE
     VFNMSUB321PD     ymmreg,ymmreg,ymmrm256   FMA,FUTURE
     VFMADD132SS      xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFMADD132SD      xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFMADD312SS      xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFMADD312SD      xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFMADD213SS      xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFMADD213SD      xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFMADD123SS      xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFMADD123SD      xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFMADD231SS      xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFMADD231SD      xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFMADD321SS      xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFMADD321SD      xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFMSUB132SS      xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFMSUB132SD      xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFMSUB312SS      xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFMSUB312SD      xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFMSUB213SS      xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFMSUB213SD      xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFMSUB123SS      xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFMSUB123SD      xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFMSUB231SS      xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFMSUB231SD      xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFMSUB321SS      xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFMSUB321SD      xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFNMADD132SS     xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFNMADD132SD     xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFNMADD312SS     xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFNMADD312SD     xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFNMADD213SS     xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFNMADD213SD     xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFNMADD123SS     xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFNMADD123SD     xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFNMADD231SS     xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFNMADD231SD     xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFNMADD321SS     xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFNMADD321SD     xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFNMSUB132SS     xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFNMSUB132SD     xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFNMSUB312SS     xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFNMSUB312SD     xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFNMSUB213SS     xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFNMSUB213SD     xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFNMSUB123SS     xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFNMSUB123SD     xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFNMSUB231SS     xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFNMSUB231SD     xmmreg,xmmreg,xmmrm64    FMA,FUTURE
     VFNMSUB321SS     xmmreg,xmmreg,xmmrm32    FMA,FUTURE
     VFNMSUB321SD     xmmreg,xmmreg,xmmrm64    FMA,FUTURE


File: nasm.info,  Node: Section B.1.29,  Next: Section B.1.30,  Prev: Section B.1.28,  Up: Section B.1

B.1.29. VIA (Centaur) security instructions
-------------------------------------------

     XSTORE                                    PENT,CYRIX
     XCRYPTECB                                 PENT,CYRIX
     XCRYPTCBC                                 PENT,CYRIX
     XCRYPTCTR                                 PENT,CYRIX
     XCRYPTCFB                                 PENT,CYRIX
     XCRYPTOFB                                 PENT,CYRIX
     MONTMUL                                   PENT,CYRIX
     XSHA1                                     PENT,CYRIX
     XSHA256                                   PENT,CYRIX


File: nasm.info,  Node: Section B.1.30,  Next: Section B.1.31,  Prev: Section B.1.29,  Up: Section B.1

B.1.30. AMD Lightweight Profiling (LWP) instructions
----------------------------------------------------

     LLWPCB           reg16                    AMD
     LLWPCB           reg32                    AMD,386
     LLWPCB           reg64                    AMD,X64
     SLWPCB           reg16                    AMD
     SLWPCB           reg32                    AMD,386
     SLWPCB           reg64                    AMD,X64
     LWPVAL           reg16,rm32,imm16         AMD,386
     LWPVAL           reg32,rm32,imm32         AMD,386
     LWPVAL           reg64,rm32,imm32         AMD,X64
     LWPINS           reg16,rm32,imm16         AMD,386
     LWPINS           reg32,rm32,imm32         AMD,386
     LWPINS           reg64,rm32,imm32         AMD,X64


File: nasm.info,  Node: Section B.1.31,  Next: Section B.1.32,  Prev: Section B.1.30,  Up: Section B.1

B.1.31. AMD XOP, FMA4 and CVT16 instructions (SSE5)
---------------------------------------------------

     VCVTPH2PS        xmmreg,xmmrm64*,imm8     AMD,SSE5
     VCVTPH2PS        ymmreg,xmmrm128,imm8     AMD,SSE5
     VCVTPH2PS        ymmreg,ymmrm128*,imm8    AMD,SSE5
     VCVTPS2PH        xmmrm64,xmmreg*,imm8     AMD,SSE5
     VCVTPS2PH        xmmrm128,ymmreg,imm8     AMD,SSE5
     VCVTPS2PH        ymmrm128,ymmreg*,imm8    AMD,SSE5
     VFMADDPD         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VFMADDPD         ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5
     VFMADDPD         xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5
     VFMADDPD         ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5
     VFMADDPS         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VFMADDPS         ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5
     VFMADDPS         xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5
     VFMADDPS         ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5
     VFMADDSD         xmmreg,xmmreg*,xmmrm64,xmmreg AMD,SSE5
     VFMADDSD         xmmreg,xmmreg*,xmmreg,xmmrm64 AMD,SSE5
     VFMADDSS         xmmreg,xmmreg*,xmmrm32,xmmreg AMD,SSE5
     VFMADDSS         xmmreg,xmmreg*,xmmreg,xmmrm32 AMD,SSE5
     VFMADDSUBPD      xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VFMADDSUBPD      ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5
     VFMADDSUBPD      xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5
     VFMADDSUBPD      ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5
     VFMADDSUBPS      xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VFMADDSUBPS      ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5
     VFMADDSUBPS      xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5
     VFMADDSUBPS      ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5
     VFMSUBADDPD      xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VFMSUBADDPD      ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5
     VFMSUBADDPD      xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5
     VFMSUBADDPD      ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5
     VFMSUBADDPS      xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VFMSUBADDPS      ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5
     VFMSUBADDPS      xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5
     VFMSUBADDPS      ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5
     VFMSUBPD         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VFMSUBPD         ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5
     VFMSUBPD         xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5
     VFMSUBPD         ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5
     VFMSUBPS         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VFMSUBPS         ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5
     VFMSUBPS         xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5
     VFMSUBPS         ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5
     VFMSUBSD         xmmreg,xmmreg*,xmmrm64,xmmreg AMD,SSE5
     VFMSUBSD         xmmreg,xmmreg*,xmmreg,xmmrm64 AMD,SSE5
     VFMSUBSS         xmmreg,xmmreg*,xmmrm32,xmmreg AMD,SSE5
     VFMSUBSS         xmmreg,xmmreg*,xmmreg,xmmrm32 AMD,SSE5
     VFNMADDPD        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VFNMADDPD        ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5
     VFNMADDPD        xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5
     VFNMADDPD        ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5
     VFNMADDPS        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VFNMADDPS        ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5
     VFNMADDPS        xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5
     VFNMADDPS        ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5
     VFNMADDSD        xmmreg,xmmreg*,xmmrm64,xmmreg AMD,SSE5
     VFNMADDSD        xmmreg,xmmreg*,xmmreg,xmmrm64 AMD,SSE5
     VFNMADDSS        xmmreg,xmmreg*,xmmrm32,xmmreg AMD,SSE5
     VFNMADDSS        xmmreg,xmmreg*,xmmreg,xmmrm32 AMD,SSE5
     VFNMSUBPD        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VFNMSUBPD        ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5
     VFNMSUBPD        xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5
     VFNMSUBPD        ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5
     VFNMSUBPS        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VFNMSUBPS        ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5
     VFNMSUBPS        xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5
     VFNMSUBPS        ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5
     VFNMSUBSD        xmmreg,xmmreg*,xmmrm64,xmmreg AMD,SSE5
     VFNMSUBSD        xmmreg,xmmreg*,xmmreg,xmmrm64 AMD,SSE5
     VFNMSUBSS        xmmreg,xmmreg*,xmmrm32,xmmreg AMD,SSE5
     VFNMSUBSS        xmmreg,xmmreg*,xmmreg,xmmrm32 AMD,SSE5
     VFRCZPD          xmmreg,xmmrm128*         AMD,SSE5
     VFRCZPD          ymmreg,ymmrm256*         AMD,SSE5
     VFRCZPS          xmmreg,xmmrm128*         AMD,SSE5
     VFRCZPS          ymmreg,ymmrm256*         AMD,SSE5
     VFRCZSD          xmmreg,xmmrm64*          AMD,SSE5
     VFRCZSS          xmmreg,xmmrm32*          AMD,SSE5
     VPCMOV           xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VPCMOV           ymmreg,ymmreg*,ymmrm256,ymmreg AMD,SSE5
     VPCMOV           xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5
     VPCMOV           ymmreg,ymmreg*,ymmreg,ymmrm256 AMD,SSE5
     VPCOMB           xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5
     VPCOMD           xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5
     VPCOMQ           xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5
     VPCOMUB          xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5
     VPCOMUD          xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5
     VPCOMUQ          xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5
     VPCOMUW          xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5
     VPCOMW           xmmreg,xmmreg*,xmmrm128,imm8 AMD,SSE5
     VPHADDBD         xmmreg,xmmrm128*         AMD,SSE5
     VPHADDBQ         xmmreg,xmmrm128*         AMD,SSE5
     VPHADDBW         xmmreg,xmmrm128*         AMD,SSE5
     VPHADDDQ         xmmreg,xmmrm128*         AMD,SSE5
     VPHADDUBD        xmmreg,xmmrm128*         AMD,SSE5
     VPHADDUBQ        xmmreg,xmmrm128*         AMD,SSE5
     VPHADDUBW        xmmreg,xmmrm128*         AMD,SSE5
     VPHADDUDQ        xmmreg,xmmrm128*         AMD,SSE5
     VPHADDUWD        xmmreg,xmmrm128*         AMD,SSE5
     VPHADDUWQ        xmmreg,xmmrm128*         AMD,SSE5
     VPHADDWD         xmmreg,xmmrm128*         AMD,SSE5
     VPHADDWQ         xmmreg,xmmrm128*         AMD,SSE5
     VPHSUBBW         xmmreg,xmmrm128*         AMD,SSE5
     VPHSUBDQ         xmmreg,xmmrm128*         AMD,SSE5
     VPHSUBWD         xmmreg,xmmrm128*         AMD,SSE5
     VPMACSDD         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VPMACSDQH        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VPMACSDQL        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VPMACSSDD        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VPMACSSDQH       xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VPMACSSDQL       xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VPMACSSWD        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VPMACSSWW        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VPMACSWD         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VPMACSWW         xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VPMADCSSWD       xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VPMADCSWD        xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VPPERM           xmmreg,xmmreg*,xmmreg,xmmrm128 AMD,SSE5
     VPPERM           xmmreg,xmmreg*,xmmrm128,xmmreg AMD,SSE5
     VPROTB           xmmreg,xmmrm128*,xmmreg  AMD,SSE5
     VPROTB           xmmreg,xmmreg*,xmmrm128  AMD,SSE5
     VPROTB           xmmreg,xmmrm128*,imm8    AMD,SSE5
     VPROTD           xmmreg,xmmrm128*,xmmreg  AMD,SSE5
     VPROTD           xmmreg,xmmreg*,xmmrm128  AMD,SSE5
     VPROTD           xmmreg,xmmrm128*,imm8    AMD,SSE5
     VPROTQ           xmmreg,xmmrm128*,xmmreg  AMD,SSE5
     VPROTQ           xmmreg,xmmreg*,xmmrm128  AMD,SSE5
     VPROTQ           xmmreg,xmmrm128*,imm8    AMD,SSE5
     VPROTW           xmmreg,xmmrm128*,xmmreg  AMD,SSE5
     VPROTW           xmmreg,xmmreg*,xmmrm128  AMD,SSE5
     VPROTW           xmmreg,xmmrm128*,imm8    AMD,SSE5
     VPSHAB           xmmreg,xmmrm128*,xmmreg  AMD,SSE5
     VPSHAB           xmmreg,xmmreg*,xmmrm128  AMD,SSE5
     VPSHAD           xmmreg,xmmrm128*,xmmreg  AMD,SSE5
     VPSHAD           xmmreg,xmmreg*,xmmrm128  AMD,SSE5
     VPSHAQ           xmmreg,xmmrm128*,xmmreg  AMD,SSE5
     VPSHAQ           xmmreg,xmmreg*,xmmrm128  AMD,SSE5
     VPSHAW           xmmreg,xmmrm128*,xmmreg  AMD,SSE5
     VPSHAW           xmmreg,xmmreg*,xmmrm128  AMD,SSE5
     VPSHLB           xmmreg,xmmrm128*,xmmreg  AMD,SSE5
     VPSHLB           xmmreg,xmmreg*,xmmrm128  AMD,SSE5
     VPSHLD           xmmreg,xmmrm128*,xmmreg  AMD,SSE5
     VPSHLD           xmmreg,xmmreg*,xmmrm128  AMD,SSE5
     VPSHLQ           xmmreg,xmmrm128*,xmmreg  AMD,SSE5
     VPSHLQ           xmmreg,xmmreg*,xmmrm128  AMD,SSE5
     VPSHLW           xmmreg,xmmrm128*,xmmreg  AMD,SSE5
     VPSHLW           xmmreg,xmmreg*,xmmrm128  AMD,SSE5


File: nasm.info,  Node: Section B.1.32,  Next: Appendix C,  Prev: Section B.1.31,  Up: Section B.1

B.1.32. Systematic names for the hinting nop instructions
---------------------------------------------------------

     HINT_NOP0        rm16                     P6,UNDOC
     HINT_NOP0        rm32                     P6,UNDOC
     HINT_NOP0        rm64                     X64,UNDOC
     HINT_NOP1        rm16                     P6,UNDOC
     HINT_NOP1        rm32                     P6,UNDOC
     HINT_NOP1        rm64                     X64,UNDOC
     HINT_NOP2        rm16                     P6,UNDOC
     HINT_NOP2        rm32                     P6,UNDOC
     HINT_NOP2        rm64                     X64,UNDOC
     HINT_NOP3        rm16                     P6,UNDOC
     HINT_NOP3        rm32                     P6,UNDOC
     HINT_NOP3        rm64                     X64,UNDOC
     HINT_NOP4        rm16                     P6,UNDOC
     HINT_NOP4        rm32                     P6,UNDOC
     HINT_NOP4        rm64                     X64,UNDOC
     HINT_NOP5        rm16                     P6,UNDOC
     HINT_NOP5        rm32                     P6,UNDOC
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     HINT_NOP63       rm16                     P6,UNDOC
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     HINT_NOP63       rm64                     X64,UNDOC


File: nasm.info,  Node: Appendix C,  Next: Section C.1,  Prev: Section B.1.32,  Up: Top

Appendix C: NASM Version History
********************************

* Menu:

* Section C.1:: NASM 2 Series
* Section C.2:: NASM 0.98 Series
* Section C.3:: NASM 0.9 Series


File: nasm.info,  Node: Section C.1,  Next: Section C.1.1,  Prev: Appendix C,  Up: Appendix C

C.1. NASM 2 Series
==================

The NASM 2 series support x86-64, and is the production version of NASM
since 2007.

* Menu:

* Section C.1.1:: Version 2.08
* Section C.1.2:: Version 2.07
* Section C.1.3:: Version 2.06
* Section C.1.4:: Version 2.05.01
* Section C.1.5:: Version 2.05
* Section C.1.6:: Version 2.04
* Section C.1.7:: Version 2.03.01
* Section C.1.8:: Version 2.03
* Section C.1.9:: Version 2.02
* Section C.1.10:: Version 2.01
* Section C.1.11:: Version 2.00


File: nasm.info,  Node: Section C.1.1,  Next: Section C.1.2,  Prev: Section C.1,  Up: Section C.1

C.1.1. Version 2.08
-------------------

   * A number of enhancements/fixes in macros area.

   * Support for converting strings to tokens. See *Note Section
     4.1.9::.

   * Fuzzy operand size logic introduced.

   * Fix COFF stack overrun on too long export identifiers.

   * Fix Macho-O alignment bug.

   * Fix crashes with -fwin32 on file with many exports.

   * Fix stack overrun for too long [DEBUG id].

   * Fix incorrect sbyte usage in IMUL (hit only if optimization flag
     passed).

   * Append ending token for `.stabs' records in the ELF output format.

   * New NSIS script which uses ModernUI and MultiUser approach.

   * Visual Studio 2008 NASM integration (rules file).

   * Warn a user if a constant is too long (and as result will be
     stripped).

   * The obsoleted pre-XOP AMD SSE5 instruction set which was never
     actualized was removed.

   * Fix stack overrun on too long error file name passed from the
     command line.

   * Bind symbols to the .text section by default (ie in case if SECTION
     directive was omitted) in the ELF output format.

   * Fix sync points array index wrapping.

   * A few fixes for FMA4 and XOP instruction templates.

   * Add AMD Lightweight Profiling (LWP) instructions.

   * Fix the offset for `%arg' in 64-bit mode.

   * An undefined local macro (`%$') no longer matches a global macro
     with the same name.

   * Fix NULL dereference on too long local labels.


File: nasm.info,  Node: Section C.1.2,  Next: Section C.1.3,  Prev: Section C.1.1,  Up: Section C.1

C.1.2. Version 2.07
-------------------

   * NASM is now under the 2-clause BSD license. See *Note Section
     1.1.2::.

   * Fix the section type for the `.strtab' section in the `elf64'
     output format.

   * Fix the handling of `COMMON' directives in the `obj' output format.

   * New `ith' and `srec' output formats; these are variants of the
     `bin' output format which output Intel hex and Motorola S-records,
     respectively. See *Note Section 7.2:: and *Note Section 7.3::.

   * `rdf2ihx' replaced with an enhanced `rdf2bin', which can output
     binary, COM, Intel hex or Motorola S-records.

   * The Windows installer now puts the NASM directory first in the
     `PATH' of the "NASM Shell".

   * Revert the early expansion behavior of `%+' to pre-2.06 behavior:
     `%+' is only expanded late.

   * Yet another Mach-O alignment fix.

   * Don't delete the list file on errors. Also, include error and
     warning information in the list file.

   * Support for 64-bit Mach-O output, see *Note Section 7.8::.

   * Fix assert failure on certain operations that involve strings with
     high-bit bytes.


File: nasm.info,  Node: Section C.1.3,  Next: Section C.1.4,  Prev: Section C.1.2,  Up: Section C.1

C.1.3. Version 2.06
-------------------

   * This release is dedicated to the memory of Charles A. Crayne, long
     time NASM developer as well as moderator of `comp.lang.asm.x86'
     and author of the book _Serious Assembler_. We miss you, Chuck.

   * Support for indirect macro expansion (`%[...]'). See *Note Section
     4.1.3::.

   * `%pop' can now take an argument, see *Note Section 4.7.1::.

   * The argument to `%use' is no longer macro-expanded. Use `%[...]'
     if macro expansion is desired.

   * Support for thread-local storage in ELF32 and ELF64. See *Note
     Section 7.9.4::.

   * Fix crash on `%ifmacro' without an argument.

   * Correct the arguments to the `POPCNT' instruction.

   * Fix section alignment in the Mach-O format.

   * Update AVX support to version 5 of the Intel specification.

   * Fix the handling of accesses to context-local macros from higher
     levels in the context stack.

   * Treat `WAIT' as a prefix rather than as an instruction, thereby
     allowing constructs like `O16 FSAVE' to work correctly.

   * Support for structures with a non-zero base offset. See *Note
     Section 4.11.10::.

   * Correctly handle preprocessor token concatenation (see *Note
     Section 4.3.7::) involving floating-point numbers.

   * The `PINSR' series of instructions have been corrected and
     rationalized.

   * Removed AMD SSE5, replaced with the new XOP/FMA4/CVT16 (rev 3.03)
     spec.

   * The ELF backends no longer automatically generate a `.comment'
     section.

   * Add additional "well-known" ELF sections with default attributes.
     See *Note Section 7.9.2::.


File: nasm.info,  Node: Section C.1.4,  Next: Section C.1.5,  Prev: Section C.1.3,  Up: Section C.1

C.1.4. Version 2.05.01
----------------------

   * Fix the `-w'/`-W' option parsing, which was broken in NASM 2.05.


File: nasm.info,  Node: Section C.1.5,  Next: Section C.1.6,  Prev: Section C.1.4,  Up: Section C.1

C.1.5. Version 2.05
-------------------

   * Fix redundant REX.W prefix on `JMP reg64'.

   * Make the behaviour of `-O0' match NASM 0.98 legacy behavior. See
     *Note Section 2.1.22::.

   * `-w-user' can be used to suppress the output of `%warning'
     directives. See *Note Section 2.1.24::.

   * Fix bug where `ALIGN' would issue a full alignment datum instead of
     zero bytes.

   * Fix offsets in list files.

   * Fix `%include' inside multi-line macros or loops.

   * Fix error where NASM would generate a spurious warning on valid
     optimizations of immediate values.

   * Fix arguments to a number of the `CVT' SSE instructions.

   * Fix RIP-relative offsets when the instruction carries an immediate.

   * Massive overhaul of the ELF64 backend for spec compliance.

   * Fix the Geode `PFRCPV' and `PFRSQRTV' instruction.

   * Fix the SSE 4.2 `CRC32' instruction.


File: nasm.info,  Node: Section C.1.6,  Next: Section C.1.7,  Prev: Section C.1.5,  Up: Section C.1

C.1.6. Version 2.04
-------------------

   * Sanitize macro handing in the `%error' directive.

   * New `%warning' directive to issue user-controlled warnings.

   * `%error' directives are now deferred to the final assembly phase.

   * New `%fatal' directive to immediately terminate assembly.

   * New `%strcat' directive to join quoted strings together.

   * New `%use' macro directive to support standard macro directives.
     See *Note Section 4.6.4::.

   * Excess default parameters to `%macro' now issues a warning by
     default.  See *Note Section 4.3::.

   * Fix `%ifn' and `%elifn'.

   * Fix nested `%else' clauses.

   * Correct the handling of nested `%rep's.

   * New `%unmacro' directive to undeclare a multi-line macro. See
     *Note Section 4.3.10::.

   * Builtin macro `__PASS__' which expands to the current assembly
     pass.  See *Note Section 4.11.9::.

   * `__utf16__' and `__utf32__' operators to generate UTF-16 and UTF-
     32 strings. See *Note Section 3.4.5::.

   * Fix bug in case-insensitive matching when compiled on platforms
     that don't use the `configure' script. Of the official release
     binaries, that only affected the OS/2 binary.

   * Support for x87 packed BCD constants. See *Note Section 3.4.7::.

   * Correct the `LTR' and `SLDT' instructions in 64-bit mode.

   * Fix unnecessary REX.W prefix on indirect jumps in 64-bit mode.

   * Add AVX versions of the AES instructions (`VAES'...).

   * Fix the 256-bit FMA instructions.

   * Add 256-bit AVX stores per the latest AVX spec.

   * VIA XCRYPT instructions can now be written either with or without
     `REP', apparently different versions of the VIA spec wrote them
     differently.

   * Add missing 64-bit `MOVNTI' instruction.

   * Fix the operand size of `VMREAD' and `VMWRITE'.

   * Numerous bug fixes, especially to the AES, AVX and VTX
     instructions.

   * The optimizer now always runs until it converges. It also runs
     even when disabled, but doesn't optimize. This allows most forward
     references to be resolved properly.

   * `%push' no longer needs a context identifier; omitting the context
     identifier results in an anonymous context.


File: nasm.info,  Node: Section C.1.7,  Next: Section C.1.8,  Prev: Section C.1.6,  Up: Section C.1

C.1.7. Version 2.03.01
----------------------

   * Fix buffer overflow in the listing module.

   * Fix the handling of hexadecimal escape codes in `...` strings.

   * The Postscript/PDF documentation has been reformatted.

   * The `-F' option now implies `-g'.


File: nasm.info,  Node: Section C.1.8,  Next: Section C.1.9,  Prev: Section C.1.7,  Up: Section C.1

C.1.8. Version 2.03
-------------------

   * Add support for Intel AVX, CLMUL and FMA instructions, including
     YMM registers.

   * `dy', `resy' and `yword' for 32-byte operands.

   * Fix some SSE5 instructions.

   * Intel `INVEPT', `INVVPID' and `MOVBE' instructions.

   * Fix checking for critical expressions when the optimizer is
     enabled.

   * Support the DWARF debugging format for ELF targets.

   * Fix optimizations of signed bytes.

   * Fix operation on bigendian machines.

   * Fix buffer overflow in the preprocessor.

   * `SAFESEH' support for Win32, `IMAGEREL' for Win64 (SEH).

   * `%?' and `%??' to refer to the name of a macro itself. In
     particular, `%idefine keyword $%?' can be used to make a keyword
     "disappear".

   * New options for dependency generation: `-MD', `-MF', `-MP', `-MT',
     `-MQ'.

   * New preprocessor directives `%pathsearch' and `%depend'; INCBIN
     reimplemented as a macro.

   * `%include' now resolves macros in a sane manner.

   * `%substr' can now be used to get other than one-character
     substrings.

   * New type of character/string constants, using backquotes (``...`'),
     which support C-style escape sequences.

   * `%defstr' and `%idefstr' to stringize macro definitions before
     creation.

   * Fix forward references used in `EQU' statements.


File: nasm.info,  Node: Section C.1.9,  Next: Section C.1.10,  Prev: Section C.1.8,  Up: Section C.1

C.1.9. Version 2.02
-------------------

   * Additional fixes for MMX operands with explicit `qword', as well as
     (hopefully) SSE operands with `oword'.

   * Fix handling of truncated strings with `DO'.

   * Fix segfaults due to memory overwrites when floating-point
     constants were used.

   * Fix segfaults due to missing include files.

   * Fix OpenWatcom Makefiles for DOS and OS/2.

   * Add autogenerated instruction list back into the documentation.

   * ELF: Fix segfault when generating stabs, and no symbols have been
     defined.

   * ELF: Experimental support for DWARF debugging information.

   * New compile date and time standard macros.

   * `%ifnum' now returns true for negative numbers.

   * New `%iftoken' test for a single token.

   * New `%ifempty' test for empty expansion.

   * Add support for the `XSAVE' instruction group.

   * Makefile for Netware/gcc.

   * Fix issue with some warnings getting emitted way too many times.

   * Autogenerated instruction list added to the documentation.


File: nasm.info,  Node: Section C.1.10,  Next: Section C.1.11,  Prev: Section C.1.9,  Up: Section C.1

C.1.10. Version 2.01
--------------------

   * Fix the handling of MMX registers with explicit `qword' tags on
     memory (broken in 2.00 due to 64-bit changes.)

   * Fix the PREFETCH instructions.

   * Fix the documentation.

   * Fix debugging info when using `-f elf' (backwards compatibility
     alias for `-f elf32').

   * Man pages for rdoff tools (from the Debian project.)

   * ELF: handle large numbers of sections.

   * Fix corrupt output when the optimizer runs out of passes.


File: nasm.info,  Node: Section C.1.11,  Next: Section C.2,  Prev: Section C.1.10,  Up: Section C.1

C.1.11. Version 2.00
--------------------

   * Added c99 data-type compliance.

   * Added general x86-64 support.

   * Added win64 (x86-64 COFF) output format.

   * Added `__BITS__' standard macro.

   * Renamed the `elf' output format to `elf32' for clarity.

   * Added `elf64' and `macho' (MacOS X) output formats.

   * Added Numeric constants in `dq' directive.

   * Added `oword', `do' and `reso' pseudo operands.

   * Allow underscores in numbers.

   * Added 8-, 16- and 128-bit floating-point formats.

   * Added binary, octal and hexadecimal floating-point.

   * Correct the generation of floating-point constants.

   * Added floating-point option control.

   * Added Infinity and NaN floating point support.

   * Added ELF Symbol Visibility support.

   * Added setting OSABI value in ELF header directive.

   * Added Generate Makefile Dependencies option.

   * Added Unlimited Optimization Passes option.

   * Added `%IFN' and `%ELIFN' support.

   * Added Logical Negation Operator.

   * Enhanced Stack Relative Preprocessor Directives.

   * Enhanced ELF Debug Formats.

   * Enhanced Send Errors to a File option.

   * Added SSSE3, SSE4.1, SSE4.2, SSE5 support.

   * Added a large number of additional instructions.

   * Significant performance improvements.

   * `-w+warning' and `-w-warning' can now be written as -Wwarning and
     -Wno-warning, respectively. See *Note Section 2.1.24::.

   * Add `-w+error' to treat warnings as errors. See *Note Section
     2.1.24::.

   * Add `-w+all' and `-w-all' to enable or disable all suppressible
     warnings. See *Note Section 2.1.24::.


File: nasm.info,  Node: Section C.2,  Next: Section C.2.1,  Prev: Section C.1.11,  Up: Appendix C

C.2. NASM 0.98 Series
=====================

The 0.98 series was the production versions of NASM from 1999 to 2007.

* Menu:

* Section C.2.1:: Version 0.98.39
* Section C.2.2:: Version 0.98.38
* Section C.2.3:: Version 0.98.37
* Section C.2.4:: Version 0.98.36
* Section C.2.5:: Version 0.98.35
* Section C.2.6:: Version 0.98.34
* Section C.2.7:: Version 0.98.33
* Section C.2.8:: Version 0.98.32
* Section C.2.9:: Version 0.98.31
* Section C.2.10:: Version 0.98.30
* Section C.2.11:: Version 0.98.28
* Section C.2.12:: Version 0.98.26
* Section C.2.13:: Version 0.98.25alt
* Section C.2.14:: Version 0.98.25
* Section C.2.15:: Version 0.98.24p1
* Section C.2.16:: Version 0.98.24
* Section C.2.17:: Version 0.98.23
* Section C.2.18:: Version 0.98.22
* Section C.2.19:: Version 0.98.21
* Section C.2.20:: Version 0.98.20
* Section C.2.21:: Version 0.98.19
* Section C.2.22:: Version 0.98.18
* Section C.2.23:: Version 0.98.17
* Section C.2.24:: Version 0.98.16
* Section C.2.25:: Version 0.98.15
* Section C.2.26:: Version 0.98.14
* Section C.2.27:: Version 0.98.13
* Section C.2.28:: Version 0.98.12
* Section C.2.29:: Version 0.98.11
* Section C.2.30:: Version 0.98.10
* Section C.2.31:: Version 0.98.09
* Section C.2.32:: Version 0.98.08
* Section C.2.33:: Version 0.98.09b with John Coffman patches released 28-Oct-2001
* Section C.2.34:: Version 0.98.07 released 01/28/01
* Section C.2.35:: Version 0.98.06f released 01/18/01
* Section C.2.36:: Version 0.98.06e released 01/09/01
* Section C.2.37:: Version 0.98p1
* Section C.2.38:: Version 0.98bf (bug-fixed)
* Section C.2.39:: Version 0.98.03 with John Coffman's changes released 27-Jul-2000
* Section C.2.40:: Version 0.98.03
* Section C.2.41:: Version 0.98
* Section C.2.42:: Version 0.98p9
* Section C.2.43:: Version 0.98p8
* Section C.2.44:: Version 0.98p7
* Section C.2.45:: Version 0.98p6
* Section C.2.46:: Version 0.98p3.7
* Section C.2.47:: Version 0.98p3.6
* Section C.2.48:: Version 0.98p3.5
* Section C.2.49:: Version 0.98p3.4
* Section C.2.50:: Version 0.98p3.3
* Section C.2.51:: Version 0.98p3.2
* Section C.2.52:: Version 0.98p3-hpa
* Section C.2.53:: Version 0.98 pre-release 3
* Section C.2.54:: Version 0.98 pre-release 2
* Section C.2.55:: Version 0.98 pre-release 1


File: nasm.info,  Node: Section C.2.1,  Next: Section C.2.2,  Prev: Section C.2,  Up: Section C.2

C.2.1. Version 0.98.39
----------------------

   * fix buffer overflow

   * fix outas86's `.bss' handling

   * "make spotless" no longer deletes config.h.in.

   * `%(el)if(n)idn' insensitivity to string quotes difference
     (#809300).

   * (nasm.c)`__OUTPUT_FORMAT__' changed to string value instead of
     symbol.


File: nasm.info,  Node: Section C.2.2,  Next: Section C.2.3,  Prev: Section C.2.1,  Up: Section C.2

C.2.2. Version 0.98.38
----------------------

   * Add Makefile for 16-bit DOS binaries under OpenWatcom, and modify
     `mkdep.pl' to be able to generate completely pathless
     dependencies, as required by OpenWatcom wmake (it supports path
     searches, but not explicit paths.)

   * Fix the `STR' instruction.

   * Fix the ELF output format, which was broken under certain
     circumstances due to the addition of stabs support.

   * Quick-fix Borland format debug-info for `-f obj'

   * Fix for `%rep' with no arguments (#560568)

   * Fix concatenation of preprocessor function call (#794686)

   * Fix long label causes coredump (#677841)

   * Use autoheader as well as autoconf to keep configure from
     generating ridiculously long command lines.

   * Make sure that all of the formats which support debugging output
     actually will suppress debugging output when `-g' not specified.


File: nasm.info,  Node: Section C.2.3,  Next: Section C.2.4,  Prev: Section C.2.2,  Up: Section C.2

C.2.3. Version 0.98.37
----------------------

   * Paths given in `-I' switch searched for `incbin'-ed as well as
     `%include'-ed files.

   * Added stabs debugging for the ELF output format, patch from Martin
     Wawro.

   * Fix `output/outbin.c' to allow origin > 80000000h.

   * Make `-U' switch work.

   * Fix the use of relative offsets with explicit prefixes, e.g.  `a32
     loop foo'.

   * Remove `backslash()'.

   * Fix the `SMSW' and `SLDT' instructions.

   * `-O2' and `-O3' are no longer aliases for `-O10' and `-O15'. If
     you mean the latter, please say so! :)


File: nasm.info,  Node: Section C.2.4,  Next: Section C.2.5,  Prev: Section C.2.3,  Up: Section C.2

C.2.4. Version 0.98.36
----------------------

   * Update rdoff - librarian/archiver - common rec - docs!

   * Fix signed/unsigned problems.

   * Fix `JMP FAR label' and `CALL FAR label'.

   * Add new multisection support - map files - fix align bug

   * Fix sysexit, movhps/movlps reg,reg bugs in insns.dat

   * `Q' or `O' suffixes indicate octal

   * Support Prescott new instructions (PNI).

   * Cyrix `XSTORE' instruction.


File: nasm.info,  Node: Section C.2.5,  Next: Section C.2.6,  Prev: Section C.2.4,  Up: Section C.2

C.2.5. Version 0.98.35
----------------------

   * Fix build failure on 16-bit DOS (Makefile.bc3 workaround for
     compiler bug.)

   * Fix dependencies and compiler warnings.

   * Add "const" in a number of places.

   * Add -X option to specify error reporting format (use -Xvc to
     integrate with Microsoft Visual Studio.)

   * Minor changes for code legibility.

   * Drop use of tmpnam() in rdoff (security fix.)


File: nasm.info,  Node: Section C.2.6,  Next: Section C.2.7,  Prev: Section C.2.5,  Up: Section C.2

C.2.6. Version 0.98.34
----------------------

   * Correct additional address-size vs. operand-size confusions.

   * Generate dependencies for all Makefiles automatically.

   * Add support for unimplemented (but theoretically available)
     registers such as tr0 and cr5. Segment registers 6 and 7 are
     called segr6 and segr7 for the operations which they can be
     represented.

   * Correct some disassembler bugs related to redundant address-size
     prefixes.  Some work still remains in this area.

   * Correctly generate an error for things like "SEG eax".

   * Add the JMPE instruction, enabled by "CPU IA64".

   * Correct compilation on newer gcc/glibc platforms.

   * Issue an error on things like "jmp far eax".


File: nasm.info,  Node: Section C.2.7,  Next: Section C.2.8,  Prev: Section C.2.6,  Up: Section C.2

C.2.7. Version 0.98.33
----------------------

   * New __NASM_PATCHLEVEL__ and __NASM_VERSION_ID__ standard macros to
     round out the version-query macros. version.pl now understands
     X.YYplWW or X.YY.ZZplWW as a version number, equivalent to
     X.YY.ZZ.WW (or X.YY.0.WW, as appropriate).

   * New keyword "strict" to disable the optimization of specific
     operands.

   * Fix the handing of size overrides with JMP instructions
     (instructions such as "jmp dword foo".)

   * Fix the handling of "ABSOLUTE label", where "label" points into a
     relocatable segment.

   * Fix OBJ output format with lots of externs.

   * More documentation updates.

   * Add -Ov option to get verbose information about optimizations.

   * Undo a braindead change which broke `%elif' directives.

   * Makefile updates.


File: nasm.info,  Node: Section C.2.8,  Next: Section C.2.9,  Prev: Section C.2.7,  Up: Section C.2

C.2.8. Version 0.98.32
----------------------

   * Fix NASM crashing when `%macro' directives were left unterminated.

   * Lots of documentation updates.

   * Complete rewrite of the PostScript/PDF documentation generator.

   * The MS Visual C++ Makefile was updated and corrected.

   * Recognize .rodata as a standard section name in ELF.

   * Fix some obsolete Perl4-isms in Perl scripts.

   * Fix configure.in to work with autoconf 2.5x.

   * Fix a couple of "make cleaner" misses.

   * Make the normal "./configure && make" work with Cygwin.


File: nasm.info,  Node: Section C.2.9,  Next: Section C.2.10,  Prev: Section C.2.8,  Up: Section C.2

C.2.9. Version 0.98.31
----------------------

   * Correctly build in a separate object directory again.

   * Derive all references to the version number from the version file.

   * New standard macros __NASM_SUBMINOR__ and __NASM_VER__ macros.

   * Lots of Makefile updates and bug fixes.

   * New `%ifmacro' directive to test for multiline macros.

   * Documentation updates.

   * Fixes for 16-bit OBJ format output.

   * Changed the NASM environment variable to NASMENV.


File: nasm.info,  Node: Section C.2.10,  Next: Section C.2.11,  Prev: Section C.2.9,  Up: Section C.2

C.2.10. Version 0.98.30
-----------------------

   * Changed doc files a lot: completely removed old READMExx and
     Wishlist files, incorporating all information in CHANGES and TODO.

   * I waited a long time to rename zoutieee.c to (original) outieee.c

   * moved all output modules to output/ subdirectory.

   * Added 'make strip' target to strip debug info from nasm & ndisasm.

   * Added INSTALL file with installation instructions.

   * Added -v option description to nasm man.

   * Added dist makefile target to produce source distributions.

   * 16-bit support for ELF output format (GNU extension, but useful.)


File: nasm.info,  Node: Section C.2.11,  Next: Section C.2.12,  Prev: Section C.2.10,  Up: Section C.2

C.2.11. Version 0.98.28
-----------------------

   * Fastcooked this for Debian's Woody release: Frank applied the
     INCBIN bug patch to 0.98.25alt and called it 0.98.28 to not
     confuse poor little apt- get.


File: nasm.info,  Node: Section C.2.12,  Next: Section C.2.13,  Prev: Section C.2.11,  Up: Section C.2

C.2.12. Version 0.98.26
-----------------------

   * Reorganised files even better from 0.98.25alt


File: nasm.info,  Node: Section C.2.13,  Next: Section C.2.14,  Prev: Section C.2.12,  Up: Section C.2

C.2.13. Version 0.98.25alt
--------------------------

   * Prettified the source tree. Moved files to more reasonable places.

   * Added findleak.pl script to misc/ directory.

   * Attempted to fix doc.


File: nasm.info,  Node: Section C.2.14,  Next: Section C.2.15,  Prev: Section C.2.13,  Up: Section C.2

C.2.14. Version 0.98.25
-----------------------

   * Line continuation character `\'.

   * Docs inadvertantly reverted - "dos packaging".


File: nasm.info,  Node: Section C.2.15,  Next: Section C.2.16,  Prev: Section C.2.14,  Up: Section C.2

C.2.15. Version 0.98.24p1
-------------------------

   * FIXME: Someone, document this please.


File: nasm.info,  Node: Section C.2.16,  Next: Section C.2.17,  Prev: Section C.2.15,  Up: Section C.2

C.2.16. Version 0.98.24
-----------------------

   * Documentation - Ndisasm doc added to Nasm.doc.


File: nasm.info,  Node: Section C.2.17,  Next: Section C.2.18,  Prev: Section C.2.16,  Up: Section C.2

C.2.17. Version 0.98.23
-----------------------

   * Attempted to remove rdoff version1

   * Lino Mastrodomenico's patches to preproc.c (%$$ bug?).


File: nasm.info,  Node: Section C.2.18,  Next: Section C.2.19,  Prev: Section C.2.17,  Up: Section C.2

C.2.18. Version 0.98.22
-----------------------

   * Update rdoff2 - attempt to remove v1.


File: nasm.info,  Node: Section C.2.19,  Next: Section C.2.20,  Prev: Section C.2.18,  Up: Section C.2

C.2.19. Version 0.98.21
-----------------------

   * Optimization fixes.


File: nasm.info,  Node: Section C.2.20,  Next: Section C.2.21,  Prev: Section C.2.19,  Up: Section C.2

C.2.20. Version 0.98.20
-----------------------

   * Optimization fixes.


File: nasm.info,  Node: Section C.2.21,  Next: Section C.2.22,  Prev: Section C.2.20,  Up: Section C.2

C.2.21. Version 0.98.19
-----------------------

   * H. J. Lu's patch back out.


File: nasm.info,  Node: Section C.2.22,  Next: Section C.2.23,  Prev: Section C.2.21,  Up: Section C.2

C.2.22. Version 0.98.18
-----------------------

   * Added ".rdata" to "-f win32".


File: nasm.info,  Node: Section C.2.23,  Next: Section C.2.24,  Prev: Section C.2.22,  Up: Section C.2

C.2.23. Version 0.98.17
-----------------------

   * H. J. Lu's "bogus elf" patch. (Red Hat problem?)


File: nasm.info,  Node: Section C.2.24,  Next: Section C.2.25,  Prev: Section C.2.23,  Up: Section C.2

C.2.24. Version 0.98.16
-----------------------

   * Fix whitespace before "[section ..." bug.


File: nasm.info,  Node: Section C.2.25,  Next: Section C.2.26,  Prev: Section C.2.24,  Up: Section C.2

C.2.25. Version 0.98.15
-----------------------

   * Rdoff changes (?).

   * Fix fixes to memory leaks.


File: nasm.info,  Node: Section C.2.26,  Next: Section C.2.27,  Prev: Section C.2.25,  Up: Section C.2

C.2.26. Version 0.98.14
-----------------------

   * Fix memory leaks.


File: nasm.info,  Node: Section C.2.27,  Next: Section C.2.28,  Prev: Section C.2.26,  Up: Section C.2

C.2.27. Version 0.98.13
-----------------------

   * There was no 0.98.13


File: nasm.info,  Node: Section C.2.28,  Next: Section C.2.29,  Prev: Section C.2.27,  Up: Section C.2

C.2.28. Version 0.98.12
-----------------------

   * Update optimization (new function of "-O1")

   * Changes to test/bintest.asm (?).


File: nasm.info,  Node: Section C.2.29,  Next: Section C.2.30,  Prev: Section C.2.28,  Up: Section C.2

C.2.29. Version 0.98.11
-----------------------

   * Optimization changes.

   * Ndisasm fixed.


File: nasm.info,  Node: Section C.2.30,  Next: Section C.2.31,  Prev: Section C.2.29,  Up: Section C.2

C.2.30. Version 0.98.10
-----------------------

   * There was no 0.98.10


File: nasm.info,  Node: Section C.2.31,  Next: Section C.2.32,  Prev: Section C.2.30,  Up: Section C.2

C.2.31. Version 0.98.09
-----------------------

   * Add multiple sections support to "-f bin".

   * Changed GLOBAL_TEMP_BASE in outelf.c from 6 to 15.

   * Add "-v" as an alias to the "-r" switch.

   * Remove "#ifdef" from Tasm compatibility options.

   * Remove redundant size-overrides on "mov ds, ex", etc.

   * Fixes to SSE2, other insns.dat (?).

   * Enable uppercase "I" and "P" switches.

   * Case insinsitive "seg" and "wrt".

   * Update install.sh (?).

   * Allocate tokens in blocks.

   * Improve "invalid effective address" messages.


File: nasm.info,  Node: Section C.2.32,  Next: Section C.2.33,  Prev: Section C.2.31,  Up: Section C.2

C.2.32. Version 0.98.08
-----------------------

   * Add "`%strlen'" and "`%substr'" macro operators

   * Fixed broken c16.mac.

   * Unterminated string error reported.

   * Fixed bugs as per 0.98bf


File: nasm.info,  Node: Section C.2.33,  Next: Section C.2.34,  Prev: Section C.2.32,  Up: Section C.2

C.2.33. Version 0.98.09b with John Coffman patches released 28-Oct-2001
-----------------------------------------------------------------------

Changes from 0.98.07 release to 98.09b as of 28-Oct-2001

   * More closely compatible with 0.98 when -O0 is implied or
     specified. Not strictly identical, since backward branches in
     range of short offsets are recognized, and signed byte values with
     no explicit size specification will be assembled as a single byte.

   * More forgiving with the PUSH instruction. 0.98 requires a size to
     be specified always. 0.98.09b will imply the size from the current
     BITS setting (16 or 32).

   * Changed definition of the optimization flag:

   -O0 strict two-pass assembly, JMP and Jcc are handled more like 0.98,
except that back- ward JMPs are short, if possible.

   -O1 strict two-pass assembly, but forward branches are assembled
with code guaranteed to reach; may produce larger code than -O0, but
will produce successful assembly more often if branch offset sizes are
not specified.

   -O2 multi-pass optimization, minimize branch offsets; also will
minimize signed immed- iate bytes, overriding size specification.

   -O3 like -O2, but more passes taken, if needed


File: nasm.info,  Node: Section C.2.34,  Next: Section C.2.35,  Prev: Section C.2.33,  Up: Section C.2

C.2.34. Version 0.98.07 released 01/28/01
-----------------------------------------

   * Added Stepane Denis' SSE2 instructions to a *working* version of
     the code - some earlier versions were based on broken code - sorry
     'bout that.  version "0.98.07"

   01/28/01

   * Cosmetic modifications to nasm.c, nasm.h, AUTHORS, MODIFIED


File: nasm.info,  Node: Section C.2.35,  Next: Section C.2.36,  Prev: Section C.2.34,  Up: Section C.2

C.2.35. Version 0.98.06f released 01/18/01
------------------------------------------

   * - Add "metalbrain"s jecxz bug fix in insns.dat - alter nasmdoc.src
     to match - version "0.98.06f"


File: nasm.info,  Node: Section C.2.36,  Next: Section C.2.37,  Prev: Section C.2.35,  Up: Section C.2

C.2.36. Version 0.98.06e released 01/09/01
------------------------------------------

   * Removed the "outforms.h" file - it appears to be someone's old
     backup of "outform.h". version "0.98.06e"

   01/09/01

   * fbk - finally added the fix for the "multiple %includes bug",
     known since 7/27/99 - reported originally (?) and sent to us by
     Austin Lunnen - he reports that John Fine had a fix within the
     day. Here it is...

   * Nelson Rush resigns from the group. Big thanks to Nelson for his
     leadership and enthusiasm in getting these changes incorporated
     into Nasm!

   * fbk - [list +], [list -] directives - ineptly implemented, should
     be re- written or removed, perhaps.

   * Brian Raiter / fbk - "elfso bug" fix - applied to aoutb format as
     well - testing might be desirable...

   08/07/00

   * James Seter - -postfix, -prefix command line switches.

   * Yuri Zaporogets - rdoff utility changes.


File: nasm.info,  Node: Section C.2.37,  Next: Section C.2.38,  Prev: Section C.2.36,  Up: Section C.2

C.2.37. Version 0.98p1
----------------------

   * GAS-like palign (Panos Minos)

   * FIXME: Someone, fill this in with details


File: nasm.info,  Node: Section C.2.38,  Next: Section C.2.39,  Prev: Section C.2.37,  Up: Section C.2

C.2.38. Version 0.98bf (bug-fixed)
----------------------------------

   * Fixed - elf and aoutb bug - shared libraries - multiple "%include"
     bug in "-f obj" - jcxz, jecxz bug - unrecognized option bug in
     ndisasm


File: nasm.info,  Node: Section C.2.39,  Next: Section C.2.40,  Prev: Section C.2.38,  Up: Section C.2

C.2.39. Version 0.98.03 with John Coffman's changes released 27-Jul-2000
------------------------------------------------------------------------

   * Added signed byte optimizations for the 0x81/0x83 class of
     instructions: ADC, ADD, AND, CMP, OR, SBB, SUB, XOR: when used as
     'ADD reg16,imm' or 'ADD reg32,imm.' Also optimization of signed
     byte form of 'PUSH imm' and 'IMUL reg,imm'/'IMUL reg,reg,imm.' No
     size specification is needed.

   * Added multi-pass JMP and Jcc offset optimization. Offsets on
     forward references will preferentially use the short form, without
     the need to code a specific size (short or near) for the branch.
     Added instructions for 'Jcc label' to use the form 'Jnotcc $+3/JMP
     label', in cases where a short offset is out of bounds. If
     compiling for a 386 or higher CPU, then the 386 form of Jcc will
     be used instead.

   This feature is controlled by a new command-line switch: "O", (upper
case letter O). "-O0" reverts the assembler to no extra optimization
passes, "- O1" allows up to 5 extra passes, and "-O2"(default), allows
up to 10 extra optimization passes.

   * Added a new directive: 'cpu XXX', where XXX is any of: 8086, 186,
     286, 386, 486, 586, pentium, 686, PPro, P2, P3 or Katmai. All are
     case insensitive.  All instructions will be selected only if they
     apply to the selected cpu or lower. Corrected a couple of bugs in
     cpu-dependence in 'insns.dat'.

   * Added to 'standard.mac', the "use16" and "use32" forms of the
     "bits 16/32" directive. This is nothing new, just conforms to a
     lot of other assemblers.  (minor)

   * Changed label allocation from 320/32 (10000 labels @ 200K+) to
     32/37 (1000 labels); makes running under DOS much easier. Since
     additional label space is allocated dynamically, this should have
     no effect on large programs with lots of labels. The 37 is a
     prime, believed to be better for hashing.  (minor)


File: nasm.info,  Node: Section C.2.40,  Next: Section C.2.41,  Prev: Section C.2.39,  Up: Section C.2

C.2.40. Version 0.98.03
-----------------------

"Integrated patchfile 0.98-0.98.01. I call this version 0.98.03 for
historical reasons: 0.98.02 was trashed." ---John Coffman
<johninsd@san.rr.com>, 27-Jul-2000

   * Kendall Bennett's SciTech MGL changes

   * Note that you must define "TASM_COMPAT" at compile-time to get the
     Tasm Ideal Mode compatibility.

   * All changes can be compiled in and out using the TASM_COMPAT
     macros, and when compiled without TASM_COMPAT defined we get the
     exact same binary as the unmodified 0.98 sources.

   * standard.mac, macros.c: Added macros to ignore TASM directives
     before first include

   * nasm.h: Added extern declaration for tasm_compatible_mode

   * nasm.c: Added global variable tasm_compatible_mode

   * Added command line switch for TASM compatible mode (-t)

   * Changed version command line to reflect when compiled with TASM
     additions

   * Added response file processing to allow all arguments on a single
     line (response file is @resp rather than -@resp for NASM format).

   * labels.c: Changes islocal() macro to support TASM style @@local
     labels.

   * Added islocalchar() macro to support TASM style @@local labels.

   * parser.c: Added support for TASM style memory references (ie: mov
     [DWORD eax],10 rather than the NASM style mov DWORD [eax],10).

   * preproc.c: Added new directives, `%arg', `%local', `%stacksize' to
     directives table

   * Added support for TASM style directives without a leading % symbol.

   * Integrated a block of changes from Andrew Zabolotny
     <bit@eltech.ru>:

   * A new keyword `%xdefine' and its case-insensitive counterpart
     `%ixdefine'. They work almost the same way as `%define' and
     `%idefine' but expand the definition immediately, not on the
     invocation. Something like a cross between `%define' and
     `%assign'. The "x" suffix stands for "eXpand", so "xdefine" can be
     deciphered as "expand-and-define". Thus you can do things like
     this:

          %assign ofs     0

          %macro  arg     1
                  %xdefine %1 dword [esp+ofs]
                  %assign ofs ofs+4
          %endmacro

   * Changed the place where the expansion of %$name macros are
     expanded. Now they are converted into ..@ctxnum.name form when
     detokenizing, so there are no quirks as before when using %$name
     arguments to macros, in macros etc. For example:

          %macro  abc     1
                  %define %1 hello
          %endm

          abc     %$here
          %$here

   Now last line will be expanded into "hello" as expected. This also
allows for lots of goodies, a good example are extended "proc" macros
included in this archive.

   * Added a check for "cstk" in smacro_defined() before calling
     get_ctx() - this allows for things like:

          %ifdef %$abc
          %endif

   to work without warnings even in no context.

   * Added a check for "cstk" in %if*ctx and %elif*ctx directives -
     this allows to use `%ifctx' without excessive warnings. If there
     is no active context, `%ifctx' goes through "false" branch.

   * Removed "user error: " prefix with `%error' directive: it just
     clobbers the output and has absolutely no functionality. Besides,
     this allows to write macros that does not differ from built-in
     functions in any way.

   * Added expansion of string that is output by `%error' directive. Now
     you can do things like:

          %define hello(x) Hello, x!

          %define %$name andy
          %error "hello(%$name)"

   Same happened with `%include' directive.

   * Now all directives that expect an identifier will try to expand and
     concatenate everything without whitespaces in between before
     usage. For example, with "unfixed" nasm the commands

          %define %$abc hello
          %define __%$abc goodbye
          __%$abc

   would produce "incorrect" output: last line will expand to

          hello goodbyehello

   Not quite what you expected, eh? :-) The answer is that preprocessor
treats the `%define' construct as if it would be

          %define __ %$abc goodbye

   (note the white space between __ and %$abc). After my "fix" it will
"correctly" expand into

          goodbye

   as expected. Note that I use quotes around words "correct",
"incorrect" etc because this is rather a feature not a bug; however
current behaviour is more logical (and allows more advanced macro usage
:-).

   Same change was applied to:
`%push',`%macro',`%imacro',`%define',`%idefine',`%xdefine',`%ixdefine',
`%assign',`%iassign',`%undef'

   * A new directive [WARNING {+|-}warning-id] have been added. It
     works only if the assembly phase is enabled (i.e. it doesn't work
     with nasm -e).

   * A new warning type: macro-selfref. By default this warning is
     disabled; when enabled NASM warns when a macro self-references
     itself; for example the following source:

            [WARNING macro-selfref]

            %macro          push    1-*
                    %rep    %0
                            push    %1
                            %rotate 1
                    %endrep
            %endmacro

                            push    eax,ebx,ecx

   will produce a warning, but if we remove the first line we won't see
it anymore (which is The Right Thing To Do {tm} IMHO since C
preprocessor eats such constructs without warnings at all).

   * Added a "error" routine to preprocessor which always will set
     ERR_PASS1 bit in severity_code. This removes annoying repeated
     errors on first and second passes from preprocessor.

   * Added the %+ operator in single-line macros for concatenating two
     identifiers. Usage example:

            %define _myfunc _otherfunc
            %define cextern(x) _ %+ x
            cextern (myfunc)

   After first expansion, third line will become "_myfunc". After this
expansion is performed again so it becomes "_otherunc".

   * Now if preprocessor is in a non-emitting state, no warning or
     error will be emitted. Example:

            %if 1
                    mov     eax,ebx
            %else
                    put anything you want between these two brackets,
                    even macro-parameter references %1 or local
                    labels %$zz or macro-local labels %%zz - no
                    warning will be emitted.
            %endif

   * Context-local variables on expansion as a last resort are looked
     up in outer contexts. For example, the following piece:

            %push   outer
            %define %$a [esp]

                    %push   inner
                    %$a
                    %pop
            %pop

   will expand correctly the fourth line to [esp]; if we'll define
another %$a inside the "inner" context, it will take precedence over
outer definition.  However, this modification has been applied only to
expand_smacro and not to smacro_define: as a consequence expansion
looks in outer contexts, but `%ifdef' won't look in outer contexts.

   This behaviour is needed because we don't want nested contexts to
act on already defined local macros. Example:

            %define %$arg1  [esp+4]
            test    eax,eax
            if      nz
                    mov     eax,%$arg1
            endif

   In this example the "if" mmacro enters into the "if" context, so
%$arg1 is not valid anymore inside "if". Of course it could be worked
around by using explicitely %$$arg1 but this is ugly IMHO.

   * Fixed memory leak in `%undef'. The origline wasn't freed before
     exiting on success.

   * Fixed trap in preprocessor when line expanded to empty set of
     tokens. This happens, for example, in the following case:

            #define SOMETHING
            SOMETHING


File: nasm.info,  Node: Section C.2.41,  Next: Section C.2.42,  Prev: Section C.2.40,  Up: Section C.2

C.2.41. Version 0.98
--------------------

All changes since NASM 0.98p3 have been produced by H. Peter Anvin
<hpa@zytor.com>.

   * The documentation comment delimiter is

   * Allow EQU definitions to refer to external labels; reported by
     Pedro Gimeno.

   * Re-enable support for RDOFF v1; reported by Pedro Gimeno.

   * Updated License file per OK from Simon and Julian.


File: nasm.info,  Node: Section C.2.42,  Next: Section C.2.43,  Prev: Section C.2.41,  Up: Section C.2

C.2.42. Version 0.98p9
----------------------

   * Update documentation (although the instruction set reference will
     have to wait; I don't want to hold up the 0.98 release for it.)

   * Verified that the NASM implementation of the PEXTRW and PMOVMSKB
     instructions is correct. The encoding differs from what the Intel
     manuals document, but the Pentium III behaviour matches NASM, not
     the Intel manuals.

   * Fix handling of implicit sizes in PSHUFW and PINSRW, reported by
     Stefan Hoffmeister.

   * Resurrect the -s option, which was removed when changing the
     diagnostic output to stdout.


File: nasm.info,  Node: Section C.2.43,  Next: Section C.2.44,  Prev: Section C.2.42,  Up: Section C.2

C.2.43. Version 0.98p8
----------------------

   * Fix for "DB" when NASM is running on a bigendian machine.

   * Invoke insns.pl once for each output script, making Makefile.in
     legal for "make -j".

   * Improve the Unix configure-based makefiles to make package
     creation easier.

   * Included an RPM .spec file for building RPM (RedHat Package
     Manager) packages on Linux or Unix systems.

   * Fix Makefile dependency problems.

   * Change src/rdsrc.pl to include sectioning information in info
     output; required for install-info to work.

   * Updated the RDOFF distribution to version 2 from Jules; minor
     massaging to make it compile in my environment.

   * Split doc files that can be built by anyone with a Perl
     interpreter off into a separate archive.

   * "Dress rehearsal" release!


File: nasm.info,  Node: Section C.2.44,  Next: Section C.2.45,  Prev: Section C.2.43,  Up: Section C.2

C.2.44. Version 0.98p7
----------------------

   * Fixed opcodes with a third byte-sized immediate argument to not
     complain if given "byte" on the immediate.

   * Allow `%undef' to remove single-line macros with arguments. This
     matches the behaviour of #undef in the C preprocessor.

   * Allow -d, -u, -i and -p to be specified as -D, -U, -I and -P for
     compatibility with most C compilers and preprocessors. This allows
     Makefile options to be shared between cc and nasm, for example.

   * Minor cleanups.

   * Went through the list of Katmai instructions and hopefully fixed
     the (rather few) mistakes in it.

   * (Hopefully) fixed a number of disassembler bugs related to
     ambiguous instructions (disambiguated by -p) and SSE instructions
     with REP.

   * Fix for bug reported by Mark Junger: "call dword 0x12345678"
     should work and may add an OSP (affected CALL, JMP, Jcc).

   * Fix for environments when "stderr" isn't a compile-time constant.


File: nasm.info,  Node: Section C.2.45,  Next: Section C.2.46,  Prev: Section C.2.44,  Up: Section C.2

C.2.45. Version 0.98p6
----------------------

   * Took officially over coordination of the 0.98 release; so drop the
     p3.x notation. Skipped p4 and p5 to avoid confusion with John
     Fine's J4 and J5 releases.

   * Update the documentation; however, it still doesn't include
     documentation for the various new instructions. I somehow wonder
     if it makes sense to have an instruction set reference in the
     assembler manual when Intel et al have PDF versions of their
     manuals online.

   * Recognize "idt" or "centaur" for the -p option to ndisasm.

   * Changed error messages back to stderr where they belong, but add
     an -E option to redirect them elsewhere (the DOS shell cannot
     redirect stderr.)

   * -M option to generate Makefile dependencies (based on code from
     Alex Verstak.)

   * `%undef' preprocessor directive, and -u option, that undefines a
     single-line macro.

   * OS/2 Makefile (Mkfiles/Makefile.os2) for Borland under OS/2; from
     Chuck Crayne.

   * Various minor bugfixes (reported by): - Dangling `%s' in preproc.c
     (Martin Junker)

   * THERE ARE KNOWN BUGS IN SSE AND THE OTHER KATMAI INSTRUCTIONS. I
     am on a trip and didn't bring the Katmai instruction reference, so
     I can't work on them right now.

   * Updated the License file per agreement with Simon and Jules to
     include a GPL distribution clause.


File: nasm.info,  Node: Section C.2.46,  Next: Section C.2.47,  Prev: Section C.2.45,  Up: Section C.2

C.2.46. Version 0.98p3.7
------------------------

   * (Hopefully) fixed the canned Makefiles to include the outrdf2 and
     zoutieee modules.

   * Renamed changes.asm to changed.asm.


File: nasm.info,  Node: Section C.2.47,  Next: Section C.2.48,  Prev: Section C.2.46,  Up: Section C.2

C.2.47. Version 0.98p3.6
------------------------

   * Fixed a bunch of instructions that were added in 0.98p3.5 which
     had memory operands, and the address-size prefix was missing from
     the instruction pattern.


File: nasm.info,  Node: Section C.2.48,  Next: Section C.2.49,  Prev: Section C.2.47,  Up: Section C.2

C.2.48. Version 0.98p3.5
------------------------

   * Merged in changes from John S. Fine's 0.98-J5 release. John's
     based 0.98-J5 on my 0.98p3.3 release; this merges the changes.

   * Expanded the instructions flag field to a long so we can fit more
     flags; mark SSE (KNI) and AMD or Katmai-specific instructions as
     such.

   * Fix the "PRIV" flag on a bunch of instructions, and create new
     "PROT" flag for protected-mode-only instructions (orthogonal to if
     the instruction is privileged!) and new "SMM" flag for SMM-only
     instructions.

   * Added AMD-only SYSCALL and SYSRET instructions.

   * Make SSE actually work, and add new Katmai MMX instructions.

   * Added a -p (preferred vendor) option to ndisasm so that it can
     distinguish e.g. Cyrix opcodes also used in SSE. For example:

          ndisasm -p cyrix aliased.bin
          00000000  670F514310        paddsiw mm0,[ebx+0x10]
          00000005  670F514320        paddsiw mm0,[ebx+0x20]
          ndisasm -p intel aliased.bin
          00000000  670F514310        sqrtps xmm0,[ebx+0x10]
          00000005  670F514320        sqrtps xmm0,[ebx+0x20]

   * Added a bunch of Cyrix-specific instructions.


File: nasm.info,  Node: Section C.2.49,  Next: Section C.2.50,  Prev: Section C.2.48,  Up: Section C.2

C.2.49. Version 0.98p3.4
------------------------

   * Made at least an attempt to modify all the additional Makefiles
     (in the Mkfiles directory). I can't test it, but this was the best
     I could do.

   * DOS DJGPP+"Opus Make" Makefile from John S. Fine.

   * changes.asm changes from John S. Fine.


File: nasm.info,  Node: Section C.2.50,  Next: Section C.2.51,  Prev: Section C.2.49,  Up: Section C.2

C.2.50. Version 0.98p3.3
------------------------

   * Patch from Conan Brink to allow nesting of `%rep' directives.

   * If we're going to allow INT01 as an alias for INT1/ICEBP (one of
     Jules 0.98p3 changes), then we should allow INT03 as an alias for
     INT3 as well.

   * Updated changes.asm to include the latest changes.

   * Tried to clean up the <CR>s that had snuck in from a DOS/Windows
     environment into my Unix environment, and try to make sure than
     DOS/Windows users get them back.

   * We would silently generate broken tools if insns.dat wasn't sorted
     properly. Change insns.pl so that the order doesn't matter.

   * Fix bug in insns.pl (introduced by me) which would cause
     conditional instructions to have an extra "cc" in disassembly,
     e.g. "jnz" disassembled as "jccnz".


File: nasm.info,  Node: Section C.2.51,  Next: Section C.2.52,  Prev: Section C.2.50,  Up: Section C.2

C.2.51. Version 0.98p3.2
------------------------

   * Merged in John S. Fine's changes from his 0.98-J4 prerelease; see
     http://www.csoft.net/cz/johnfine/

   * Changed previous "spotless" Makefile target (appropriate for
     distribution) to "distclean", and added "cleaner" target which is
     same as "clean" except deletes files generated by Perl scripts;
     "spotless" is union.

   * Removed BASIC programs from distribution. Get a Perl interpreter
     instead (see below.)

   * Calling this "pre-release 3.2" rather than "p3-hpa2" because of
     John's contributions.

   * Actually link in the IEEE output format (zoutieee.c); fix a bunch
     of compiler warnings in that file. Note I don't know what IEEE
     output is supposed to look like, so these changes were made
     "blind".


File: nasm.info,  Node: Section C.2.52,  Next: Section C.2.53,  Prev: Section C.2.51,  Up: Section C.2

C.2.52. Version 0.98p3-hpa
--------------------------

   * Merged nasm098p3.zip with nasm-0.97.tar.gz to create a fully
     buildable version for Unix systems (Makefile.in updates, etc.)

   * Changed insns.pl to create the instruction tables in nasm.h and
     names.c, so that a new instruction can be added by adding it
     *only* to insns.dat.

   * Added the following new instructions: SYSENTER, SYSEXIT, FXSAVE,
     FXRSTOR, UD1, UD2 (the latter two are two opcodes that Intel
     guarantee will never be used; one of them is documented as UD2 in
     Intel documentation, the other one just as "Undefined Opcode" ---
     calling it UD1 seemed to make sense.)

   * MAX_SYMBOL was defined to be 9, but LOADALL286 and LOADALL386 are
     10 characters long. Now MAX_SYMBOL is derived from insns.dat.

   * A note on the BASIC programs included: forget them. insns.bas is
     already out of date. Get yourself a Perl interpreter for your
     platform of choice at http://www.cpan.org/ports/index.html.


File: nasm.info,  Node: Section C.2.53,  Next: Section C.2.54,  Prev: Section C.2.52,  Up: Section C.2

C.2.53. Version 0.98 pre-release 3
----------------------------------

   * added response file support, improved command line handling, new
     layout help screen

   * fixed limit checking bug, 'OUT byte nn, reg' bug, and a couple of
     rdoff related bugs, updated Wishlist; 0.98 Prerelease 3.


File: nasm.info,  Node: Section C.2.54,  Next: Section C.2.55,  Prev: Section C.2.53,  Up: Section C.2

C.2.54. Version 0.98 pre-release 2
----------------------------------

   * fixed bug in outcoff.c to do with truncating section names longer
     than 8 characters, referencing beyond end of string; 0.98
     pre-release 2


File: nasm.info,  Node: Section C.2.55,  Next: Section C.3,  Prev: Section C.2.54,  Up: Section C.2

C.2.55. Version 0.98 pre-release 1
----------------------------------

   * Fixed a bug whereby STRUC didn't work at all in RDF.

   * Fixed a problem with group specification in PUBDEFs in OBJ.

   * Improved ease of adding new output formats. Contribution due to
     Fox Cutter.

   * Fixed a bug in relocations in the `bin' format: was showing up
     when a relocatable reference crossed an 8192-byte boundary in any
     output section.

   * Fixed a bug in local labels: local-label lookups were inconsistent
     between passes one and two if an EQU occurred between the
     definition of a global label and the subsequent use of a local
     label local to that global.

   * Fixed a seg-fault in the preprocessor (again) which happened when
     you use a blank line as the first line of a multi-line macro
     definition and then defined a label on the same line as a call to
     that macro.

   * Fixed a stale-pointer bug in the handling of the NASM environment
     variable.  Thanks to Thomas McWilliams.

   * ELF had a hard limit on the number of sections which caused
     segfaults when transgressed. Fixed.

   * Added ability for ndisasm to read from stdin by using `-' as the
     filename.

   * ndisasm wasn't outputting the TO keyword. Fixed.

   * Fixed error cascade on bogus expression in `%if' - an error in
     evaluation was causing the entire `%if' to be discarded, thus
     creating trouble later when the `%else' or `%endif' was
     encountered.

   * Forward reference tracking was instruction-granular not operand-
     granular, which was causing 286-specific code to be generated
     needlessly on code of the form `shr word [forwardref],1'. Thanks
     to Jim Hague for sending a patch.

   * All messages now appear on stdout, as sending them to stderr
     serves no useful purpose other than to make redirection difficult.

   * Fixed the problem with EQUs pointing to an external symbol - this
     now generates an error message.

   * Allowed multiple size prefixes to an operand, of which only the
     first is taken into account.

   * Incorporated John Fine's changes, including fixes of a large
     number of preprocessor bugs, some small problems in OBJ, and a
     reworking of label handling to define labels before their line is
     assembled, rather than after.

   * Reformatted a lot of the source code to be more readable. Included
     'coding.txt' as a guideline for how to format code for
     contributors.

   * Stopped nested `%reps' causing a panic - they now cause a slightly
     more friendly error message instead.

   * Fixed floating point constant problems (patch by Pedro Gimeno)

   * Fixed the return value of insn_size() not being checked for -1,
     indicating an error.

   * Incorporated 3Dnow! instructions.

   * Fixed the 'mov eax, eax + ebx' bug.

   * Fixed the GLOBAL EQU bug in ELF. Released developers release 3.

   * Incorporated John Fine's command line parsing changes

   * Incorporated David Lindauer's OMF debug support

   * Made changes for LCC 4.0 support (`__NASM_CDecl__', removed
     register size specification warning when sizes agree).


File: nasm.info,  Node: Section C.3,  Next: Section C.3.1,  Prev: Section C.2.55,  Up: Appendix C

C.3. NASM 0.9 Series
====================

Revisions before 0.98.

* Menu:

* Section C.3.1:: Version 0.97 released December 1997
* Section C.3.2:: Version 0.96 released November 1997
* Section C.3.3:: Version 0.95 released July 1997
* Section C.3.4:: Version 0.94 released April 1997
* Section C.3.5:: Version 0.93 released January 1997
* Section C.3.6:: Version 0.92 released January 1997
* Section C.3.7:: Version 0.91 released November 1996
* Section C.3.8:: Version 0.90 released October 1996


File: nasm.info,  Node: Section C.3.1,  Next: Section C.3.2,  Prev: Section C.3,  Up: Section C.3

C.3.1. Version 0.97 released December 1997
------------------------------------------

   * This was entirely a bug-fix release to 0.96, which seems to have
     got cursed. Silly me.

   * Fixed stupid mistake in OBJ which caused `MOV EAX,<constant>' to
     fail.  Caused by an error in the `MOV EAX,<segment>' support.

   * ndisasm hung at EOF when compiled with lcc on Linux because lcc on
     Linux somehow breaks feof(). ndisasm now does not rely on feof().

   * A heading in the documentation was missing due to a markup error
     in the indexing. Fixed.

   * Fixed failure to update all pointers on realloc() within extended-
     operand code in parser.c. Was causing wrong behaviour and seg
     faults on lines such as `dd 0.0,0.0,0.0,0.0,...'

   * Fixed a subtle preprocessor bug whereby invoking one multi-line
     macro on the first line of the expansion of another, when the
     second had been invoked with a label defined before it, didn't
     expand the inner macro.

   * Added internal.doc back in to the distribution archives - it was
     missing in 0.96 *blush*

   * Fixed bug causing 0.96 to be unable to assemble its own test files,
     specifically objtest.asm. *blush again*

   * Fixed seg-faults and bogus error messages caused by mismatching
     `%rep' and `%endrep' within multi-line macro definitions.

   * Fixed a problem with buffer overrun in OBJ, which was causing
     corruption at ends of long PUBDEF records.

   * Separated DOS archives into main-program and documentation to
     reduce download size.


File: nasm.info,  Node: Section C.3.2,  Next: Section C.3.3,  Prev: Section C.3.1,  Up: Section C.3

C.3.2. Version 0.96 released November 1997
------------------------------------------

   * Fixed a bug whereby, if `nasm sourcefile' would cause a filename
     collision warning and put output into `nasm.out', then `nasm
     sourcefile -o outputfile' still gave the warning even though the
     `-o' was honoured. Fixed name pollution under Digital UNIX: one of
     its header files defined R_SP, which broke the enum in nasm.h.

   * Fixed minor instruction table problems: FUCOM and FUCOMP didn't
     have two- operand forms; NDISASM didn't recognise the longer
     register forms of PUSH and POP (eg FF F3 for PUSH BX); TEST
     mem,imm32 was flagged as undocumented; the 32-bit forms of CMOV
     had 16-bit operand size prefixes; `AAD imm' and `AAM imm' are no
     longer flagged as undocumented because the Intel Architecture
     reference documents them.

   * Fixed a problem with the local-label mechanism, whereby strange
     types of symbol (EQUs, auto-defined OBJ segment base symbols)
     interfered with the `previous global label' value and screwed up
     local labels.

   * Fixed a bug whereby the stub preprocessor didn't communicate with
     the listing file generator, so that the -a and -l options in
     conjunction would produce a useless listing file.

   * Merged `os2' object file format back into `obj', after discovering
     that `obj' _also_ shouldn't have a link pass separator in a module
     containing a non-trivial MODEND. Flat segments are now declared
     using the FLAT attribute. `os2' is no longer a valid object format
     name: use `obj'.

   * Removed the fixed-size temporary storage in the evaluator. Very
     very long expressions (like `mov ax,1+1+1+1+...' for two hundred
     1s or so) should now no longer crash NASM.

   * Fixed a bug involving segfaults on disassembly of MMX
     instructions, by changing the meaning of one of the operand-type
     flags in nasm.h. This may cause other apparently unrelated MMX
     problems; it needs to be tested thoroughly.

   * Fixed some buffer overrun problems with large OBJ output files.
     Thanks to DJ Delorie for the bug report and fix.

   * Made preprocess-only mode actually listen to the `%line' markers
     as it prints them, so that it can report errors more sanely.

   * Re-designed the evaluator to keep more sensible track of
     expressions involving forward references: can now cope with
     previously-nightmare situations such as:

       mov ax,foo | bar
       foo equ 1
       bar equ 2

   * Added the ALIGN and ALIGNB standard macros.

   * Added PIC support in ELF: use of WRT to obtain the four extra
     relocation types needed.

   * Added the ability for output file formats to define their own
     extensions to the GLOBAL, COMMON and EXTERN directives.

   * Implemented common-variable alignment, and global-symbol type and
     size declarations, in ELF.

   * Implemented NEAR and FAR keywords for common variables, plus
     far-common element size specification, in OBJ.

   * Added a feature whereby EXTERNs and COMMONs in OBJ can be given a
     default WRT specification (either a segment or a group).

   * Transformed the Unix NASM archive into an auto-configuring package.

   * Added a sanity-check for people applying SEG to things which are
     already segment bases: this previously went unnoticed by the SEG
     processing and caused OBJ-driver panics later.

   * Added the ability, in OBJ format, to deal with `MOV EAX,<segment>'
     type references: OBJ doesn't directly support dword-size segment
     base fixups, but as long as the low two bytes of the constant term
     are zero, a word-size fixup can be generated instead and it will
     work.

   * Added the ability to specify sections' alignment requirements in
     Win32 object files and pure binary files.

   * Added preprocess-time expression evaluation: the `%assign' (and
     `%iassign') directive and the bare `%if' (and `%elif')
     conditional. Added relational operators to the evaluator, for use
     only in `%if' constructs: the standard relationals = < > <= >= <>
     (and C-like synonyms == and !=) plus low-precedence logical
     operators &&, ^^ and ||.

   * Added a preprocessor repeat construct: `%rep' / `%exitrep' /
     `%endrep'.

   * Added the __FILE__ and __LINE__ standard macros.

   * Added a sanity check for number constants being greater than
     0xFFFFFFFF.  The warning can be disabled.

   * Added the %0 token whereby a variadic multi-line macro can tell
     how many parameters it's been given in a specific invocation.

   * Added `%rotate', allowing multi-line macro parameters to be cycled.

   * Added the `*' option for the maximum parameter count on multi-line
     macros, allowing them to take arbitrarily many parameters.

   * Added the ability for the user-level forms of EXTERN, GLOBAL and
     COMMON to take more than one argument.

   * Added the IMPORT and EXPORT directives in OBJ format, to deal with
     Windows DLLs.

   * Added some more preprocessor `%if' constructs: `%ifidn' /
     `%ifidni' (exact textual identity), and `%ifid' / `%ifnum' /
     `%ifstr' (token type testing).

   * Added the ability to distinguish SHL AX,1 (the 8086 version) from
     SHL AX,BYTE 1 (the 286-and-upwards version whose constant happens
     to be 1).

   * Added NetBSD/FreeBSD/OpenBSD's variant of a.out format, complete
     with PIC shared library features.

   * Changed NASM's idiosyncratic handling of FCLEX, FDISI, FENI,
     FINIT, FSAVE, FSTCW, FSTENV, and FSTSW to bring it into line with
     the otherwise accepted standard. The previous behaviour, though it
     was a deliberate feature, was a deliberate feature based on a
     misunderstanding. Apologies for the inconvenience.

   * Improved the flexibility of ABSOLUTE: you can now give it an
     expression rather than being restricted to a constant, and it can
     take relocatable arguments as well.

   * Added the ability for a variable to be declared as EXTERN multiple
     times, and the subsequent definitions are just ignored.

   * We now allow instruction prefixes (CS, DS, LOCK, REPZ etc) to be
     alone on a line (without a following instruction).

   * Improved sanity checks on whether the arguments to EXTERN, GLOBAL
     and COMMON are valid identifiers.

   * Added misc/exebin.mac to allow direct generation of .EXE files by
     hacking up an EXE header using DB and DW; also added
     test/binexe.asm to demonstrate the use of this. Thanks to Yann
     Guidon for contributing the EXE header code.

   * ndisasm forgot to check whether the input file had been
     successfully opened. Now it does. Doh!

   * Added the Cyrix extensions to the MMX instruction set.

   * Added a hinting mechanism to allow [EAX+EBX] and [EBX+EAX] to be
     assembled differently. This is important since [ESI+EBP] and
     [EBP+ESI] have different default base segment registers.

   * Added support for the PharLap OMF extension for 4096-byte segment
     alignment.

