require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&_X86_PIO_H_)) {
    eval 'sub _X86_PIO_H_ () {1;}' unless defined(&_X86_PIO_H_);
    if(defined(&__OPTIMIZE__)) {
	eval 'sub __use_immediate_port {
	    my($port) = @_;
    	    eval q(( &__builtin_constant_p(($port))  && ($port) < 0x100));
	}' unless defined(&__use_immediate_port);
    } else {
	eval 'sub __use_immediate_port {
	    my($port) = @_;
    	    eval q(0);
	}' unless defined(&__use_immediate_port);
    }
    eval 'sub inb {
        my($port) = @_;
	    eval q((  &__use_immediate_port($port) ?  &__inbc($port) :  &__inb($port)));
    }' unless defined(&inb);
    eval 'sub __inbc {
        my($port) = @_;
	    eval q({  &u_int8_t  &data;  &__asm  &__volatile(\\"inb %w1,%0\\" : \\"=a\\" ( &data) : \\"id\\" ($port));  &data; });
    }' unless defined(&__inbc);
    eval 'sub __inb {
        my($port) = @_;
	    eval q({  &u_int8_t  &data;  &__asm  &__volatile(\\"inb %w1,%0\\" : \\"=a\\" ( &data) : \\"d\\" ($port));  &data; });
    }' unless defined(&__inb);
    eval 'sub insb {
        my($port,$addr,$cnt) = @_;
	    eval q({  &void * &dummy1; \'int\'  &dummy2;  &__asm  &__volatile(\\"cld\\\\n\\\\trepne\\\\n\\\\tinsb\\" : \\"=D\\" ( &dummy1), \\"=c\\" ( &dummy2) : \\"d\\" ($port), \\"0\\" ($addr), \\"1\\" ($cnt) : \\"memory\\"); });
    }' unless defined(&insb);
    eval 'sub inw {
        my($port) = @_;
	    eval q((  &__use_immediate_port($port) ?  &__inwc($port) :  &__inw($port)));
    }' unless defined(&inw);
    eval 'sub __inwc {
        my($port) = @_;
	    eval q({  &u_int16_t  &data;  &__asm  &__volatile(\\"inw %w1,%0\\" : \\"=a\\" ( &data) : \\"id\\" ($port));  &data; });
    }' unless defined(&__inwc);
    eval 'sub __inw {
        my($port) = @_;
	    eval q({  &u_int16_t  &data;  &__asm  &__volatile(\\"inw %w1,%0\\" : \\"=a\\" ( &data) : \\"d\\" ($port));  &data; });
    }' unless defined(&__inw);
    eval 'sub insw {
        my($port,$addr,$cnt) = @_;
	    eval q({  &void * &dummy1; \'int\'  &dummy2;  &__asm  &__volatile(\\"cld\\\\n\\\\trepne\\\\n\\\\tinsw\\" : \\"=D\\" ( &dummy1), \\"=c\\" ( &dummy2) : \\"d\\" ($port), \\"0\\" ($addr), \\"1\\" ($cnt) : \\"memory\\"); });
    }' unless defined(&insw);
    eval 'sub inl {
        my($port) = @_;
	    eval q((  &__use_immediate_port($port) ?  &__inlc($port) :  &__inl($port)));
    }' unless defined(&inl);
    eval 'sub __inlc {
        my($port) = @_;
	    eval q({  &u_int32_t  &data;  &__asm  &__volatile(\\"inl %w1,%0\\" : \\"=a\\" ( &data) : \\"id\\" ($port));  &data; });
    }' unless defined(&__inlc);
    eval 'sub __inl {
        my($port) = @_;
	    eval q({  &u_int32_t  &data;  &__asm  &__volatile(\\"inl %w1,%0\\" : \\"=a\\" ( &data) : \\"d\\" ($port));  &data; });
    }' unless defined(&__inl);
    eval 'sub insl {
        my($port,$addr,$cnt) = @_;
	    eval q({  &void * &dummy1; \'int\'  &dummy2;  &__asm  &__volatile(\\"cld\\\\n\\\\trepne\\\\n\\\\tinsl\\" : \\"=D\\" ( &dummy1), \\"=c\\" ( &dummy2) : \\"d\\" ($port), \\"0\\" ($addr), \\"1\\" ($cnt) : \\"memory\\"); });
    }' unless defined(&insl);
    eval 'sub outb {
        my($port, $data) = @_;
	    eval q((  &__use_immediate_port($port) ?  &__outbc($port, $data) :  &__outb($port, $data)));
    }' unless defined(&outb);
    eval 'sub __outbc {
        my($port,$data) = @_;
	    eval q({  &__asm  &__volatile(\\"outb %0,%w1\\" : : \\"a\\" ($data), \\"id\\" ($port)); });
    }' unless defined(&__outbc);
    eval 'sub __outb {
        my($port,$data) = @_;
	    eval q({  &__asm  &__volatile(\\"outb %0,%w1\\" : : \\"a\\" ($data), \\"d\\" ($port)); });
    }' unless defined(&__outb);
    eval 'sub outsb {
        my($port,$addr,$cnt) = @_;
	    eval q({  &void * &dummy1; \'int\'  &dummy2;  &__asm  &__volatile(\\"cld\\\\n\\\\trepne\\\\n\\\\toutsb\\" : \\"=S\\" ( &dummy1), \\"=c\\" ( &dummy2) : \\"d\\" ($port), \\"0\\" ($addr), \\"1\\" ($cnt)); });
    }' unless defined(&outsb);
    eval 'sub outw {
        my($port, $data) = @_;
	    eval q((  &__use_immediate_port($port) ?  &__outwc($port, $data) :  &__outw($port, $data)));
    }' unless defined(&outw);
    eval 'sub __outwc {
        my($port,$data) = @_;
	    eval q({  &__asm  &__volatile(\\"outw %0,%w1\\" : : \\"a\\" ($data), \\"id\\" ($port)); });
    }' unless defined(&__outwc);
    eval 'sub __outw {
        my($port,$data) = @_;
	    eval q({  &__asm  &__volatile(\\"outw %0,%w1\\" : : \\"a\\" ($data), \\"d\\" ($port)); });
    }' unless defined(&__outw);
    eval 'sub outsw {
        my($port,$addr,$cnt) = @_;
	    eval q({  &void * &dummy1; \'int\'  &dummy2;  &__asm  &__volatile(\\"cld\\\\n\\\\trepne\\\\n\\\\toutsw\\" : \\"=S\\" ( &dummy1), \\"=c\\" ( &dummy2) : \\"d\\" ($port), \\"0\\" ($addr), \\"1\\" ($cnt)); });
    }' unless defined(&outsw);
    eval 'sub outl {
        my($port, $data) = @_;
	    eval q((  &__use_immediate_port($port) ?  &__outlc($port, $data) :  &__outl($port, $data)));
    }' unless defined(&outl);
    eval 'sub __outlc {
        my($port,$data) = @_;
	    eval q({  &__asm  &__volatile(\\"outl %0,%w1\\" : : \\"a\\" ($data), \\"id\\" ($port)); });
    }' unless defined(&__outlc);
    eval 'sub __outl {
        my($port,$data) = @_;
	    eval q({  &__asm  &__volatile(\\"outl %0,%w1\\" : : \\"a\\" ($data), \\"d\\" ($port)); });
    }' unless defined(&__outl);
    eval 'sub outsl {
        my($port,$addr,$cnt) = @_;
	    eval q({  &void * &dummy1; \'int\'  &dummy2;  &__asm  &__volatile(\\"cld\\\\n\\\\trepne\\\\n\\\\toutsl\\" : \\"=S\\" ( &dummy1), \\"=c\\" ( &dummy2) : \\"d\\" ($port), \\"0\\" ($addr), \\"1\\" ($cnt)); });
    }' unless defined(&outsl);
}
1;
