require '_h2ph_pre.ph';

no warnings 'redefine';

unless(defined(&_IF_CASREG_H)) {
    eval 'sub _IF_CASREG_H () {1;}' unless defined(&_IF_CASREG_H);
    eval 'sub CAS_SEB_STATE () {0x;}' unless defined(&CAS_SEB_STATE);
    eval 'sub CAS_CONFIG () {0x4;}' unless defined(&CAS_CONFIG);
    eval 'sub CAS_STATUS () {0xc;}' unless defined(&CAS_STATUS);
    eval 'sub CAS_INTMASK () {0x10;}' unless defined(&CAS_INTMASK);
    eval 'sub CAS_INTACK () {0x14;}' unless defined(&CAS_INTACK);
    eval 'sub CAS_STATUS_ALIAS () {0x1c;}' unless defined(&CAS_STATUS_ALIAS);
    eval 'sub CAS_ERROR_STATUS () {0x1000;}' unless defined(&CAS_ERROR_STATUS);
    eval 'sub CAS_ERROR_MASK () {0x4;}' unless defined(&CAS_ERROR_MASK);
    eval 'sub CAS_BIF_CONFIG () {0x8;}' unless defined(&CAS_BIF_CONFIG);
    eval 'sub CAS_BIF_DIAG () {0xc;}' unless defined(&CAS_BIF_DIAG);
    eval 'sub CAS_RESET () {0x1010;}' unless defined(&CAS_RESET);
    eval 'sub CAS_SEB_ARB () {0x2;}' unless defined(&CAS_SEB_ARB);
    eval 'sub CAS_SEB_RXWON () {0x4;}' unless defined(&CAS_SEB_RXWON);
    eval 'sub CAS_CONFIG_BURST_64 () {0x;}' unless defined(&CAS_CONFIG_BURST_64);
    eval 'sub CAS_CONFIG_BURST_INF () {0x1;}' unless defined(&CAS_CONFIG_BURST_INF);
    eval 'sub CAS_CONFIG_TXDMA_LIMIT () {0x3e;}' unless defined(&CAS_CONFIG_TXDMA_LIMIT);
    eval 'sub CAS_CONFIG_RXDMA_LIMIT () {0x7c0;}' unless defined(&CAS_CONFIG_RXDMA_LIMIT);
    eval 'sub CAS_CONFIG_TXDMA_LIMIT_SHIFT () {1;}' unless defined(&CAS_CONFIG_TXDMA_LIMIT_SHIFT);
    eval 'sub CAS_CONFIG_RXDMA_LIMIT_SHIFT () {6;}' unless defined(&CAS_CONFIG_RXDMA_LIMIT_SHIFT);
    eval 'sub CAS_STATUS_TX_COMPL () {0xfff800000;}' unless defined(&CAS_STATUS_TX_COMPL);
    eval 'sub CAS_INTR_TX_INTME () {0x1;}' unless defined(&CAS_INTR_TX_INTME);
    eval 'sub CAS_INTR_TX_EMPTY () {0x2;}' unless defined(&CAS_INTR_TX_EMPTY);
    eval 'sub CAS_INTR_TX_DONE () {0x4;}' unless defined(&CAS_INTR_TX_DONE);
    eval 'sub CAS_INTR_TX_TAG_ERR () {0x8;}' unless defined(&CAS_INTR_TX_TAG_ERR);
    eval 'sub CAS_INTR_RX_DONE () {0x10;}' unless defined(&CAS_INTR_RX_DONE);
    eval 'sub CAS_INTR_RX_NOBUF () {0x20;}' unless defined(&CAS_INTR_RX_NOBUF);
    eval 'sub CAS_INTR_RX_TAG_ERR () {0x40;}' unless defined(&CAS_INTR_RX_TAG_ERR);
    eval 'sub CAS_INTR_RX_COMP_FULL () {0x80;}' unless defined(&CAS_INTR_RX_COMP_FULL);
    eval 'sub CAS_INTR_PCS () {0x2000;}' unless defined(&CAS_INTR_PCS);
    eval 'sub CAS_INTR_TX_MAC () {0x4000;}' unless defined(&CAS_INTR_TX_MAC);
    eval 'sub CAS_INTR_RX_MAC () {0x8000;}' unless defined(&CAS_INTR_RX_MAC);
    eval 'sub CAS_INTR_MAC_CONTROL () {0x10000;}' unless defined(&CAS_INTR_MAC_CONTROL);
    eval 'sub CAS_INTR_MIF () {0x20000;}' unless defined(&CAS_INTR_MIF);
    eval 'sub CAS_INTR_BERR () {0x40000;}' unless defined(&CAS_INTR_BERR);
    eval 'sub CAS_INTR_BITS () {"\\020" "\\1INTME\\2TXEMPTY\\3TXDONE\\4TX_TAG_ERR" "\\5RXDONE\\6RXNOBUF\\7RX_TAG_ERR" "\\10RX_COMP_FULL" "\\16PCS\\17TXMAC\\20RXMAC" "\\21MACCONTROL\\22MIF\\23BERR";}' unless defined(&CAS_INTR_BITS);
    eval 'sub CAS_ERROR_STAT_BADACK () {0x1;}' unless defined(&CAS_ERROR_STAT_BADACK);
    eval 'sub CAS_ERROR_STAT_DTRTO () {0x2;}' unless defined(&CAS_ERROR_STAT_DTRTO);
    eval 'sub CAS_ERROR_STAT_OTHERS () {0x4;}' unless defined(&CAS_ERROR_STAT_OTHERS);
    eval 'sub CAS_BIF_CONFIG_SLOWCLK () {0x1;}' unless defined(&CAS_BIF_CONFIG_SLOWCLK);
    eval 'sub CAS_BIF_CONFIG_HOST_64 () {0x2;}' unless defined(&CAS_BIF_CONFIG_HOST_64);
    eval 'sub CAS_BIF_CONFIG_B64D_DIS () {0x4;}' unless defined(&CAS_BIF_CONFIG_B64D_DIS);
    eval 'sub CAS_BIF_CONFIG_M66EN () {0x8;}' unless defined(&CAS_BIF_CONFIG_M66EN);
    eval 'sub CAS_RESET_TX () {0x1;}' unless defined(&CAS_RESET_TX);
    eval 'sub CAS_RESET_RX () {0x2;}' unless defined(&CAS_RESET_RX);
    eval 'sub CAS_RESET_RSTOUT () {0x4;}' unless defined(&CAS_RESET_RSTOUT);
    eval 'sub CAS_RESET_BLOCK_PCS () {0x8;}' unless defined(&CAS_RESET_BLOCK_PCS);
    eval 'sub CAS_TX_CONFIG () {0x2004;}' unless defined(&CAS_TX_CONFIG);
    eval 'sub CAS_TX_FIFO_WR_PTR () {0x2014;}' unless defined(&CAS_TX_FIFO_WR_PTR);
    eval 'sub CAS_TX_FIFO_SDWR_PTR () {0x2018;}' unless defined(&CAS_TX_FIFO_SDWR_PTR);
    eval 'sub CAS_TX_FIFO_RD_PTR () {0x201c;}' unless defined(&CAS_TX_FIFO_RD_PTR);
    eval 'sub CAS_TX_FIFO_SDRD_PTR () {0x2020;}' unless defined(&CAS_TX_FIFO_SDRD_PTR);
    eval 'sub CAS_TX_FIFO_PKT_CNT () {0x2024;}' unless defined(&CAS_TX_FIFO_PKT_CNT);
    eval 'sub CAS_TX_STATE_MACHINE () {0x2028;}' unless defined(&CAS_TX_STATE_MACHINE);
    eval 'sub CAS_TX_DATA_PTR () {0x2030;}' unless defined(&CAS_TX_DATA_PTR);
    eval 'sub CAS_TX_KICK1 () {0x2038;}' unless defined(&CAS_TX_KICK1);
    eval 'sub CAS_TX_KICK2 () {0x203c;}' unless defined(&CAS_TX_KICK2);
    eval 'sub CAS_TX_KICK3 () {0x2040;}' unless defined(&CAS_TX_KICK3);
    eval 'sub CAS_TX_KICK4 () {0x2044;}' unless defined(&CAS_TX_KICK4);
    eval 'sub CAS_TX_COMPLETION1 () {0x2048;}' unless defined(&CAS_TX_COMPLETION1);
    eval 'sub CAS_TX_COMPLETION2 () {0x204c;}' unless defined(&CAS_TX_COMPLETION2);
    eval 'sub CAS_TX_COMPLETION3 () {0x2050;}' unless defined(&CAS_TX_COMPLETION3);
    eval 'sub CAS_TX_COMPLETION4 () {0x2054;}' unless defined(&CAS_TX_COMPLETION4);
    eval 'sub CAS_TX_RING_PTR_LO1 () {0x2060;}' unless defined(&CAS_TX_RING_PTR_LO1);
    eval 'sub CAS_TX_RING_PTR_HI1 () {0x2064;}' unless defined(&CAS_TX_RING_PTR_HI1);
    eval 'sub CAS_TX_RING_PTR_LO2 () {0x2068;}' unless defined(&CAS_TX_RING_PTR_LO2);
    eval 'sub CAS_TX_RING_PTR_HI2 () {0x206c;}' unless defined(&CAS_TX_RING_PTR_HI2);
    eval 'sub CAS_TX_RING_PTR_LO3 () {0x2070;}' unless defined(&CAS_TX_RING_PTR_LO3);
    eval 'sub CAS_TX_RING_PTR_HI3 () {0x2074;}' unless defined(&CAS_TX_RING_PTR_HI3);
    eval 'sub CAS_TX_RING_PTR_LO4 () {0x2078;}' unless defined(&CAS_TX_RING_PTR_LO4);
    eval 'sub CAS_TX_RING_PTR_HI4 () {0x207c;}' unless defined(&CAS_TX_RING_PTR_HI4);
    eval 'sub CAS_TX_MAXBURST1 () {0x2080;}' unless defined(&CAS_TX_MAXBURST1);
    eval 'sub CAS_TX_MAXBURST2 () {0x2084;}' unless defined(&CAS_TX_MAXBURST2);
    eval 'sub CAS_TX_MAXBURST3 () {0x2088;}' unless defined(&CAS_TX_MAXBURST3);
    eval 'sub CAS_TX_MAXBURST4 () {0x208c;}' unless defined(&CAS_TX_MAXBURST4);
    eval 'sub CAS_TX_KICK () { &CAS_TX_KICK3;}' unless defined(&CAS_TX_KICK);
    eval 'sub CAS_TX_COMPLETION () { &CAS_TX_COMPLETION3;}' unless defined(&CAS_TX_COMPLETION);
    eval 'sub CAS_TX_RING_PTR_LO () { &CAS_TX_RING_PTR_LO3;}' unless defined(&CAS_TX_RING_PTR_LO);
    eval 'sub CAS_TX_RING_PTR_HI () { &CAS_TX_RING_PTR_HI3;}' unless defined(&CAS_TX_RING_PTR_HI);
    eval 'sub CAS_TX_FIFO_ADDRESS () {0x2104;}' unless defined(&CAS_TX_FIFO_ADDRESS);
    eval 'sub CAS_TX_FIFO_TAG () {0x2108;}' unless defined(&CAS_TX_FIFO_TAG);
    eval 'sub CAS_TX_FIFO_DATA_LO () {0x210c;}' unless defined(&CAS_TX_FIFO_DATA_LO);
    eval 'sub CAS_TX_FIFO_DATA_HI_T1 () {0x2110;}' unless defined(&CAS_TX_FIFO_DATA_HI_T1);
    eval 'sub CAS_TX_FIFO_DATA_HI_T0 () {0x2114;}' unless defined(&CAS_TX_FIFO_DATA_HI_T0);
    eval 'sub CAS_TX_FIFO_SIZE () {0x2118;}' unless defined(&CAS_TX_FIFO_SIZE);
    eval 'sub CAS_TX_DEBUG () {0x3028;}' unless defined(&CAS_TX_DEBUG);
    eval 'sub CAS_TX_CONFIG_TXDMA_EN () {0x1;}' unless defined(&CAS_TX_CONFIG_TXDMA_EN);
    eval 'sub CAS_TX_CONFIG_TXRING_SZ () {0x3c;}' unless defined(&CAS_TX_CONFIG_TXRING_SZ);
    eval 'sub CAS_TX_CONFIG_PACED () {0x100000;}' unless defined(&CAS_TX_CONFIG_PACED);
    eval 'sub CAS_RING_SZ_32 () {0;}' unless defined(&CAS_RING_SZ_32);
    eval 'sub CAS_RING_SZ_64 () {1;}' unless defined(&CAS_RING_SZ_64);
    eval 'sub CAS_RING_SZ_128 () {2;}' unless defined(&CAS_RING_SZ_128);
    eval 'sub CAS_RING_SZ_256 () {3;}' unless defined(&CAS_RING_SZ_256);
    eval 'sub CAS_RING_SZ_512 () {4;}' unless defined(&CAS_RING_SZ_512);
    eval 'sub CAS_RING_SZ_1024 () {5;}' unless defined(&CAS_RING_SZ_1024);
    eval 'sub CAS_RING_SZ_2048 () {6;}' unless defined(&CAS_RING_SZ_2048);
    eval 'sub CAS_RING_SZ_4096 () {7;}' unless defined(&CAS_RING_SZ_4096);
    eval 'sub CAS_RING_SZ_8192 () {8;}' unless defined(&CAS_RING_SZ_8192);
    eval 'sub CAS_TX_COMPLETION_MASK () {0x1fff;}' unless defined(&CAS_TX_COMPLETION_MASK);
    eval 'sub CAS_RX_CONFIG () {0x4000;}' unless defined(&CAS_RX_CONFIG);
    eval 'sub CAS_RX_PAGE_SIZE () {0x4004;}' unless defined(&CAS_RX_PAGE_SIZE);
    eval 'sub CAS_RX_FIFO_WR_PTR () {0x4008;}' unless defined(&CAS_RX_FIFO_WR_PTR);
    eval 'sub CAS_RX_FIFO_RD_PTR () {0x400c;}' unless defined(&CAS_RX_FIFO_RD_PTR);
    eval 'sub CAS_RX_IPPFIFO_WR_PTR () {0x4010;}' unless defined(&CAS_RX_IPPFIFO_WR_PTR);
    eval 'sub CAS_RX_IPPFIFO_RD_PTR () {0x4014;}' unless defined(&CAS_RX_IPPFIFO_RD_PTR);
    eval 'sub CAS_RX_IPPFIFO_SDWR_PTR () {0x4018;}' unless defined(&CAS_RX_IPPFIFO_SDWR_PTR);
    eval 'sub CAS_RX_DEBUG () {0x401c;}' unless defined(&CAS_RX_DEBUG);
    eval 'sub CAS_RX_PAUSE_THRESH () {0x4020;}' unless defined(&CAS_RX_PAUSE_THRESH);
    eval 'sub CAS_RX_KICK () {0x4024;}' unless defined(&CAS_RX_KICK);
    eval 'sub CAS_RX_DRING_PTR_LO () {0x4028;}' unless defined(&CAS_RX_DRING_PTR_LO);
    eval 'sub CAS_RX_DRING_PTR_HI () {0x402c;}' unless defined(&CAS_RX_DRING_PTR_HI);
    eval 'sub CAS_RX_CRING_PTR_LO () {0x4030;}' unless defined(&CAS_RX_CRING_PTR_LO);
    eval 'sub CAS_RX_CRING_PTR_HI () {0x4034;}' unless defined(&CAS_RX_CRING_PTR_HI);
    eval 'sub CAS_RX_COMPLETION () {0x4038;}' unless defined(&CAS_RX_COMPLETION);
    eval 'sub CAS_RX_COMP_HEAD () {0x403c;}' unless defined(&CAS_RX_COMP_HEAD);
    eval 'sub CAS_RX_COMP_TAIL () {0x4040;}' unless defined(&CAS_RX_COMP_TAIL);
    eval 'sub CAS_RX_BLANKING () {0x4044;}' unless defined(&CAS_RX_BLANKING);
    eval 'sub CAS_RX_RED () {0x404c;}' unless defined(&CAS_RX_RED);
    eval 'sub CAS_RX_IPP_PKT_CNT () {0x4054;}' unless defined(&CAS_RX_IPP_PKT_CNT);
    eval 'sub CAS_RX_FIFO_ADDRESS () {0x4080;}' unless defined(&CAS_RX_FIFO_ADDRESS);
    eval 'sub CAS_RX_FIFO_TAG () {0x4084;}' unless defined(&CAS_RX_FIFO_TAG);
    eval 'sub CAS_RX_FIFO_DATA_LO () {0x4088;}' unless defined(&CAS_RX_FIFO_DATA_LO);
    eval 'sub CAS_RX_FIFO_DATA_HI_T0 () {0x408c;}' unless defined(&CAS_RX_FIFO_DATA_HI_T0);
    eval 'sub CAS_RX_FIFO_DATA_HI_T1 () {0x4090;}' unless defined(&CAS_RX_FIFO_DATA_HI_T1);
    eval 'sub CAS_RX_DRING_PTR_LO2 () {0x4200;}' unless defined(&CAS_RX_DRING_PTR_LO2);
    eval 'sub CAS_RX_DRING_PTR_HI2 () {0x4204;}' unless defined(&CAS_RX_DRING_PTR_HI2);
    eval 'sub CAS_RX_CRING_PTR_LO2 () {0x4208;}' unless defined(&CAS_RX_CRING_PTR_LO2);
    eval 'sub CAS_RX_CRING_PTR_HI2 () {0x420c;}' unless defined(&CAS_RX_CRING_PTR_HI2);
    eval 'sub CAS_RX_CRING_PTR_LO3 () {0x4210;}' unless defined(&CAS_RX_CRING_PTR_LO3);
    eval 'sub CAS_RX_CRING_PTR_HI3 () {0x4214;}' unless defined(&CAS_RX_CRING_PTR_HI3);
    eval 'sub CAS_RX_CRING_PTR_LO4 () {0x4218;}' unless defined(&CAS_RX_CRING_PTR_LO4);
    eval 'sub CAS_RX_CRING_PTR_HI4 () {0x421c;}' unless defined(&CAS_RX_CRING_PTR_HI4);
    eval 'sub CAS_RX_KICK2 () {0x4220;}' unless defined(&CAS_RX_KICK2);
    eval 'sub CAS_RX_COMPLETION2 () {0x4224;}' unless defined(&CAS_RX_COMPLETION2);
    eval 'sub CAS_RX_COMP_HEAD2 () {0x4228;}' unless defined(&CAS_RX_COMP_HEAD2);
    eval 'sub CAS_RX_COMP_TAIL2 () {0x422c;}' unless defined(&CAS_RX_COMP_TAIL2);
    eval 'sub CAS_RX_COMP_HEAD3 () {0x4230;}' unless defined(&CAS_RX_COMP_HEAD3);
    eval 'sub CAS_RX_COMP_TAIL3 () {0x4234;}' unless defined(&CAS_RX_COMP_TAIL3);
    eval 'sub CAS_RX_COMP_HEAD4 () {0x4238;}' unless defined(&CAS_RX_COMP_HEAD4);
    eval 'sub CAS_RX_COMP_TAIL4 () {0x423c;}' unless defined(&CAS_RX_COMP_TAIL4);
    eval 'sub CAS_RX_CONFIG_RXDMA_EN () {0x1;}' unless defined(&CAS_RX_CONFIG_RXDMA_EN);
    eval 'sub CAS_RX_CONFIG_RXDRNG_SZ () {0x1e;}' unless defined(&CAS_RX_CONFIG_RXDRNG_SZ);
    eval 'sub CAS_RX_CONFIG_RXCRNG_SZ () {0x1e0;}' unless defined(&CAS_RX_CONFIG_RXCRNG_SZ);
    eval 'sub CAS_RX_CONFIG_BATCH_DIS () {0x200;}' unless defined(&CAS_RX_CONFIG_BATCH_DIS);
    eval 'sub CAS_RX_CONFIG_FBOFF () {0x1c00;}' unless defined(&CAS_RX_CONFIG_FBOFF);
    eval 'sub CAS_RX_CONFIG_RXDRNG_SZ_SHIFT () {1;}' unless defined(&CAS_RX_CONFIG_RXDRNG_SZ_SHIFT);
    eval 'sub CAS_RX_CONFIG_RXCRNG_SZ_SHIFT () {5;}' unless defined(&CAS_RX_CONFIG_RXCRNG_SZ_SHIFT);
    eval 'sub CAS_RX_CONFIG_FBOFF_SHFT () {10;}' unless defined(&CAS_RX_CONFIG_FBOFF_SHFT);
    eval 'sub CAS_RX_CONFIG_RXDRNG2_SZ_SHIFT () {16;}' unless defined(&CAS_RX_CONFIG_RXDRNG2_SZ_SHIFT);
    eval 'sub CAS_RX_PAGE_SIZE_SZ () {0x3;}' unless defined(&CAS_RX_PAGE_SIZE_SZ);
    eval 'sub CAS_RX_PAGE_SIZE_COUNT () {0x7800;}' unless defined(&CAS_RX_PAGE_SIZE_COUNT);
    eval 'sub CAS_RX_PAGE_SIZE_STRIDE () {0x18000000;}' unless defined(&CAS_RX_PAGE_SIZE_STRIDE);
    eval 'sub CAS_RX_PAGE_SIZE_FBOFF () {0xc0000000;}' unless defined(&CAS_RX_PAGE_SIZE_FBOFF);
    eval 'sub CAS_RX_PAGE_SIZE_COUNT_SHIFT () {11;}' unless defined(&CAS_RX_PAGE_SIZE_COUNT_SHIFT);
    eval 'sub CAS_RX_PAGE_SIZE_STRIDE_SHIFT () {27;}' unless defined(&CAS_RX_PAGE_SIZE_STRIDE_SHIFT);
    eval 'sub CAS_RX_PAGE_SIZE_FBOFF_SHIFT () {30;}' unless defined(&CAS_RX_PAGE_SIZE_FBOFF_SHIFT);
    eval 'sub CAS_RX_PTH_XOFF_THRESH () {0x1ff;}' unless defined(&CAS_RX_PTH_XOFF_THRESH);
    eval 'sub CAS_RX_PTH_XON_THRESH () {0x7fc0000;}' unless defined(&CAS_RX_PTH_XON_THRESH);
    eval 'sub CAS_RX_BLANKING_PACKETS () {0x1ff;}' unless defined(&CAS_RX_BLANKING_PACKETS);
    eval 'sub CAS_RX_BLANKING_TIME () {0x3fc0000;}' unless defined(&CAS_RX_BLANKING_TIME);
    eval 'sub CAS_MAC_TXRESET () {0x6000;}' unless defined(&CAS_MAC_TXRESET);
    eval 'sub CAS_MAC_RXRESET () {0x6004;}' unless defined(&CAS_MAC_RXRESET);
    eval 'sub CAS_MAC_SEND_PAUSE_CMD () {0x6008;}' unless defined(&CAS_MAC_SEND_PAUSE_CMD);
    eval 'sub CAS_MAC_TX_STATUS () {0x6010;}' unless defined(&CAS_MAC_TX_STATUS);
    eval 'sub CAS_MAC_RX_STATUS () {0x6014;}' unless defined(&CAS_MAC_RX_STATUS);
    eval 'sub CAS_MAC_CONTROL_STATUS () {0x6018;}' unless defined(&CAS_MAC_CONTROL_STATUS);
    eval 'sub CAS_MAC_TX_MASK () {0x6020;}' unless defined(&CAS_MAC_TX_MASK);
    eval 'sub CAS_MAC_RX_MASK () {0x6024;}' unless defined(&CAS_MAC_RX_MASK);
    eval 'sub CAS_MAC_CONTROL_MASK () {0x6028;}' unless defined(&CAS_MAC_CONTROL_MASK);
    eval 'sub CAS_MAC_TX_CONFIG () {0x6030;}' unless defined(&CAS_MAC_TX_CONFIG);
    eval 'sub CAS_MAC_RX_CONFIG () {0x6034;}' unless defined(&CAS_MAC_RX_CONFIG);
    eval 'sub CAS_MAC_CONTROL_CONFIG () {0x6038;}' unless defined(&CAS_MAC_CONTROL_CONFIG);
    eval 'sub CAS_MAC_XIF_CONFIG () {0x603c;}' unless defined(&CAS_MAC_XIF_CONFIG);
    eval 'sub CAS_MAC_IPG0 () {0x6040;}' unless defined(&CAS_MAC_IPG0);
    eval 'sub CAS_MAC_IPG1 () {0x6044;}' unless defined(&CAS_MAC_IPG1);
    eval 'sub CAS_MAC_IPG2 () {0x6048;}' unless defined(&CAS_MAC_IPG2);
    eval 'sub CAS_MAC_SLOT_TIME () {0x604c;}' unless defined(&CAS_MAC_SLOT_TIME);
    eval 'sub CAS_MAC_MAC_MIN_FRAME () {0x6050;}' unless defined(&CAS_MAC_MAC_MIN_FRAME);
    eval 'sub CAS_MAC_MAC_MAX_FRAME () {0x6054;}' unless defined(&CAS_MAC_MAC_MAX_FRAME);
    eval 'sub CAS_MAC_PREAMBLE_LEN () {0x6058;}' unless defined(&CAS_MAC_PREAMBLE_LEN);
    eval 'sub CAS_MAC_JAM_SIZE () {0x605c;}' unless defined(&CAS_MAC_JAM_SIZE);
    eval 'sub CAS_MAC_ATTEMPT_LIMIT () {0x6060;}' unless defined(&CAS_MAC_ATTEMPT_LIMIT);
    eval 'sub CAS_MAC_CONTROL_TYPE () {0x6064;}' unless defined(&CAS_MAC_CONTROL_TYPE);
    eval 'sub CAS_MAC_ADDR0 () {0x6080;}' unless defined(&CAS_MAC_ADDR0);
    eval 'sub CAS_MAC_ADDR1 () {0x6084;}' unless defined(&CAS_MAC_ADDR1);
    eval 'sub CAS_MAC_ADDR2 () {0x6088;}' unless defined(&CAS_MAC_ADDR2);
    eval 'sub CAS_MAC_ADDR3 () {0x608c;}' unless defined(&CAS_MAC_ADDR3);
    eval 'sub CAS_MAC_ADDR4 () {0x6090;}' unless defined(&CAS_MAC_ADDR4);
    eval 'sub CAS_MAC_ADDR5 () {0x6094;}' unless defined(&CAS_MAC_ADDR5);
    eval 'sub CAS_MAC_ADDR42 () {0x6128;}' unless defined(&CAS_MAC_ADDR42);
    eval 'sub CAS_MAC_ADDR43 () {0x612c;}' unless defined(&CAS_MAC_ADDR43);
    eval 'sub CAS_MAC_ADDR44 () {0x6130;}' unless defined(&CAS_MAC_ADDR44);
    eval 'sub CAS_MAC_ADDR_FILTER0 () {0x614c;}' unless defined(&CAS_MAC_ADDR_FILTER0);
    eval 'sub CAS_MAC_ADDR_FILTER1 () {0x6150;}' unless defined(&CAS_MAC_ADDR_FILTER1);
    eval 'sub CAS_MAC_ADDR_FILTER2 () {0x6154;}' unless defined(&CAS_MAC_ADDR_FILTER2);
    eval 'sub CAS_MAC_ADR_FLT_MASK1_2 () {0x6158;}' unless defined(&CAS_MAC_ADR_FLT_MASK1_2);
    eval 'sub CAS_MAC_ADR_FLT_MASK0 () {0x615c;}' unless defined(&CAS_MAC_ADR_FLT_MASK0);
    eval 'sub CAS_MAC_HASH0 () {0x6160;}' unless defined(&CAS_MAC_HASH0);
    eval 'sub CAS_MAC_HASH1 () {0x6164;}' unless defined(&CAS_MAC_HASH1);
    eval 'sub CAS_MAC_HASH2 () {0x6168;}' unless defined(&CAS_MAC_HASH2);
    eval 'sub CAS_MAC_HASH3 () {0x616c;}' unless defined(&CAS_MAC_HASH3);
    eval 'sub CAS_MAC_HASH4 () {0x6170;}' unless defined(&CAS_MAC_HASH4);
    eval 'sub CAS_MAC_HASH5 () {0x6174;}' unless defined(&CAS_MAC_HASH5);
    eval 'sub CAS_MAC_HASH6 () {0x6178;}' unless defined(&CAS_MAC_HASH6);
    eval 'sub CAS_MAC_HASH7 () {0x617c;}' unless defined(&CAS_MAC_HASH7);
    eval 'sub CAS_MAC_HASH8 () {0x6180;}' unless defined(&CAS_MAC_HASH8);
    eval 'sub CAS_MAC_HASH9 () {0x6184;}' unless defined(&CAS_MAC_HASH9);
    eval 'sub CAS_MAC_HASH10 () {0x6188;}' unless defined(&CAS_MAC_HASH10);
    eval 'sub CAS_MAC_HASH11 () {0x618c;}' unless defined(&CAS_MAC_HASH11);
    eval 'sub CAS_MAC_HASH12 () {0x6190;}' unless defined(&CAS_MAC_HASH12);
    eval 'sub CAS_MAC_HASH13 () {0x6194;}' unless defined(&CAS_MAC_HASH13);
    eval 'sub CAS_MAC_HASH14 () {0x6198;}' unless defined(&CAS_MAC_HASH14);
    eval 'sub CAS_MAC_HASH15 () {0x619c;}' unless defined(&CAS_MAC_HASH15);
    eval 'sub CAS_MAC_NORM_COLL_CNT () {0x61a0;}' unless defined(&CAS_MAC_NORM_COLL_CNT);
    eval 'sub CAS_MAC_FIRST_COLL_CNT () {0x61a4;}' unless defined(&CAS_MAC_FIRST_COLL_CNT);
    eval 'sub CAS_MAC_EXCESS_COLL_CNT () {0x61a8;}' unless defined(&CAS_MAC_EXCESS_COLL_CNT);
    eval 'sub CAS_MAC_LATE_COLL_CNT () {0x61ac;}' unless defined(&CAS_MAC_LATE_COLL_CNT);
    eval 'sub CAS_MAC_DEFER_TMR_CNT () {0x61b0;}' unless defined(&CAS_MAC_DEFER_TMR_CNT);
    eval 'sub CAS_MAC_PEAK_ATTEMPTS () {0x61b4;}' unless defined(&CAS_MAC_PEAK_ATTEMPTS);
    eval 'sub CAS_MAC_RX_FRAME_COUNT () {0x61b8;}' unless defined(&CAS_MAC_RX_FRAME_COUNT);
    eval 'sub CAS_MAC_RX_LEN_ERR_CNT () {0x61bc;}' unless defined(&CAS_MAC_RX_LEN_ERR_CNT);
    eval 'sub CAS_MAC_RX_ALIGN_ERR () {0x61c0;}' unless defined(&CAS_MAC_RX_ALIGN_ERR);
    eval 'sub CAS_MAC_RX_CRC_ERR_CNT () {0x61c4;}' unless defined(&CAS_MAC_RX_CRC_ERR_CNT);
    eval 'sub CAS_MAC_RX_CODE_VIOL () {0x61c8;}' unless defined(&CAS_MAC_RX_CODE_VIOL);
    eval 'sub CAS_MAC_RANDOM_SEED () {0x61cc;}' unless defined(&CAS_MAC_RANDOM_SEED);
    eval 'sub CAS_MAC_MAC_STATE () {0x61d0;}' unless defined(&CAS_MAC_MAC_STATE);
    eval 'sub CAS_MAC_PAUSE_CMD_TIME () {0xffff;}' unless defined(&CAS_MAC_PAUSE_CMD_TIME);
    eval 'sub CAS_MAC_PAUSE_CMD_SEND () {0x10000;}' unless defined(&CAS_MAC_PAUSE_CMD_SEND);
    eval 'sub CAS_MAC_TX_XMIT_DONE () {0x1;}' unless defined(&CAS_MAC_TX_XMIT_DONE);
    eval 'sub CAS_MAC_TX_UNDERRUN () {0x2;}' unless defined(&CAS_MAC_TX_UNDERRUN);
    eval 'sub CAS_MAC_TX_PKT_TOO_LONG () {0x4;}' unless defined(&CAS_MAC_TX_PKT_TOO_LONG);
    eval 'sub CAS_MAC_TX_NCC_EXP () {0x8;}' unless defined(&CAS_MAC_TX_NCC_EXP);
    eval 'sub CAS_MAC_TX_ECC_EXP () {0x10;}' unless defined(&CAS_MAC_TX_ECC_EXP);
    eval 'sub CAS_MAC_TX_LCC_EXP () {0x20;}' unless defined(&CAS_MAC_TX_LCC_EXP);
    eval 'sub CAS_MAC_TX_FCC_EXP () {0x40;}' unless defined(&CAS_MAC_TX_FCC_EXP);
    eval 'sub CAS_MAC_TX_DEFER_EXP () {0x80;}' unless defined(&CAS_MAC_TX_DEFER_EXP);
    eval 'sub CAS_MAC_TX_PEAK_EXP () {0x100;}' unless defined(&CAS_MAC_TX_PEAK_EXP);
    eval 'sub CAS_MAC_RX_DONE () {0x1;}' unless defined(&CAS_MAC_RX_DONE);
    eval 'sub CAS_MAC_RX_OVERFLOW () {0x2;}' unless defined(&CAS_MAC_RX_OVERFLOW);
    eval 'sub CAS_MAC_RX_FRAME_CNT () {0x4;}' unless defined(&CAS_MAC_RX_FRAME_CNT);
    eval 'sub CAS_MAC_RX_ALIGN_EXP () {0x8;}' unless defined(&CAS_MAC_RX_ALIGN_EXP);
    eval 'sub CAS_MAC_RX_CRC_EXP () {0x10;}' unless defined(&CAS_MAC_RX_CRC_EXP);
    eval 'sub CAS_MAC_RX_LEN_EXP () {0x20;}' unless defined(&CAS_MAC_RX_LEN_EXP);
    eval 'sub CAS_MAC_RX_CVI_EXP () {0x40;}' unless defined(&CAS_MAC_RX_CVI_EXP);
    eval 'sub CAS_MAC_PAUSED () {0x1;}' unless defined(&CAS_MAC_PAUSED);
    eval 'sub CAS_MAC_PAUSE () {0x2;}' unless defined(&CAS_MAC_PAUSE);
    eval 'sub CAS_MAC_RESUME () {0x4;}' unless defined(&CAS_MAC_RESUME);
    eval 'sub CAS_MAC_PAUSE_TIME () {0xffff0000;}' unless defined(&CAS_MAC_PAUSE_TIME);
    eval 'sub CAS_MAC_XIF_TX_MII_ENA () {0x1;}' unless defined(&CAS_MAC_XIF_TX_MII_ENA);
    eval 'sub CAS_MAC_XIF_MII_LOOPBK () {0x2;}' unless defined(&CAS_MAC_XIF_MII_LOOPBK);
    eval 'sub CAS_MAC_XIF_ECHO_DISABL () {0x4;}' unless defined(&CAS_MAC_XIF_ECHO_DISABL);
    eval 'sub CAS_MAC_XIF_GMII_MODE () {0x8;}' unless defined(&CAS_MAC_XIF_GMII_MODE);
    eval 'sub CAS_MAC_XIF_MII_BUF_ENA () {0x10;}' unless defined(&CAS_MAC_XIF_MII_BUF_ENA);
    eval 'sub CAS_MAC_XIF_LINK_LED () {0x20;}' unless defined(&CAS_MAC_XIF_LINK_LED);
    eval 'sub CAS_MAC_XIF_FDPLX_LED () {0x40;}' unless defined(&CAS_MAC_XIF_FDPLX_LED);
    eval 'sub CAS_MAC_SLOT_INT () {0x40;}' unless defined(&CAS_MAC_SLOT_INT);
    eval 'sub CAS_MAC_SLOT_EXT () {0x200;}' unless defined(&CAS_MAC_SLOT_EXT);
    eval 'sub CAS_MAC_TX_ENABLE () {0x1;}' unless defined(&CAS_MAC_TX_ENABLE);
    eval 'sub CAS_MAC_TX_IGN_CARRIER () {0x2;}' unless defined(&CAS_MAC_TX_IGN_CARRIER);
    eval 'sub CAS_MAC_TX_IGN_COLLIS () {0x4;}' unless defined(&CAS_MAC_TX_IGN_COLLIS);
    eval 'sub CAS_MAC_TX_ENA_IPG0 () {0x8;}' unless defined(&CAS_MAC_TX_ENA_IPG0);
    eval 'sub CAS_MAC_TX_NGU () {0x10;}' unless defined(&CAS_MAC_TX_NGU);
    eval 'sub CAS_MAC_TX_NGU_LIMIT () {0x20;}' unless defined(&CAS_MAC_TX_NGU_LIMIT);
    eval 'sub CAS_MAC_TX_NO_BACKOFF () {0x40;}' unless defined(&CAS_MAC_TX_NO_BACKOFF);
    eval 'sub CAS_MAC_TX_SLOWDOWN () {0x80;}' unless defined(&CAS_MAC_TX_SLOWDOWN);
    eval 'sub CAS_MAC_TX_NO_FCS () {0x100;}' unless defined(&CAS_MAC_TX_NO_FCS);
    eval 'sub CAS_MAC_TX_CARR_EXTEND () {0x200;}' unless defined(&CAS_MAC_TX_CARR_EXTEND);
    eval 'sub CAS_MAC_RX_ENABLE () {0x1;}' unless defined(&CAS_MAC_RX_ENABLE);
    eval 'sub CAS_MAC_RX_STRIP_PAD () {0x2;}' unless defined(&CAS_MAC_RX_STRIP_PAD);
    eval 'sub CAS_MAC_RX_STRIP_CRC () {0x4;}' unless defined(&CAS_MAC_RX_STRIP_CRC);
    eval 'sub CAS_MAC_RX_PROMISCUOUS () {0x8;}' unless defined(&CAS_MAC_RX_PROMISCUOUS);
    eval 'sub CAS_MAC_RX_PROMISC_GRP () {0x10;}' unless defined(&CAS_MAC_RX_PROMISC_GRP);
    eval 'sub CAS_MAC_RX_HASH_FILTER () {0x20;}' unless defined(&CAS_MAC_RX_HASH_FILTER);
    eval 'sub CAS_MAC_RX_ADDR_FILTER () {0x40;}' unless defined(&CAS_MAC_RX_ADDR_FILTER);
    eval 'sub CAS_MAC_RX_ERRCHK_DIS () {0x80;}' unless defined(&CAS_MAC_RX_ERRCHK_DIS);
    eval 'sub CAS_MAC_RX_CARR_EXTEND () {0x100;}' unless defined(&CAS_MAC_RX_CARR_EXTEND);
    eval 'sub CAS_MAC_CC_TX_PAUSE () {0x1;}' unless defined(&CAS_MAC_CC_TX_PAUSE);
    eval 'sub CAS_MAC_CC_RX_PAUSE () {0x2;}' unless defined(&CAS_MAC_CC_RX_PAUSE);
    eval 'sub CAS_MAC_CC_PASS_PAUSE () {0x4;}' unless defined(&CAS_MAC_CC_PASS_PAUSE);
    eval 'sub CAS_MIF_BB_CLOCK () {0x6200;}' unless defined(&CAS_MIF_BB_CLOCK);
    eval 'sub CAS_MIF_BB_DATA () {0x6204;}' unless defined(&CAS_MIF_BB_DATA);
    eval 'sub CAS_MIF_BB_OUTPUT_ENAB () {0x6208;}' unless defined(&CAS_MIF_BB_OUTPUT_ENAB);
    eval 'sub CAS_MIF_FRAME () {0x620c;}' unless defined(&CAS_MIF_FRAME);
    eval 'sub CAS_MIF_CONFIG () {0x6210;}' unless defined(&CAS_MIF_CONFIG);
    eval 'sub CAS_MIF_INTERRUPT_MASK () {0x6214;}' unless defined(&CAS_MIF_INTERRUPT_MASK);
    eval 'sub CAS_MIF_BASIC_STATUS () {0x6218;}' unless defined(&CAS_MIF_BASIC_STATUS);
    eval 'sub CAS_MIF_STATE_MACHINE () {0x621c;}' unless defined(&CAS_MIF_STATE_MACHINE);
    eval 'sub CAS_MIF_FRAME_DATA () {0xffff;}' unless defined(&CAS_MIF_FRAME_DATA);
    eval 'sub CAS_MIF_FRAME_TA0 () {0x10000;}' unless defined(&CAS_MIF_FRAME_TA0);
    eval 'sub CAS_MIF_FRAME_TA1 () {0x20000;}' unless defined(&CAS_MIF_FRAME_TA1);
    eval 'sub CAS_MIF_FRAME_REG_ADDR () {0x7c0000;}' unless defined(&CAS_MIF_FRAME_REG_ADDR);
    eval 'sub CAS_MIF_FRAME_PHY_ADDR () {0xf800000;}' unless defined(&CAS_MIF_FRAME_PHY_ADDR);
    eval 'sub CAS_MIF_FRAME_OP () {0x30000000;}' unless defined(&CAS_MIF_FRAME_OP);
    eval 'sub CAS_MIF_FRAME_START () {0xc0000000;}' unless defined(&CAS_MIF_FRAME_START);
    eval 'sub CAS_MIF_FRAME_READ () {0x60020000;}' unless defined(&CAS_MIF_FRAME_READ);
    eval 'sub CAS_MIF_FRAME_WRITE () {0x50020000;}' unless defined(&CAS_MIF_FRAME_WRITE);
    eval 'sub CAS_MIF_REG_SHIFT () {18;}' unless defined(&CAS_MIF_REG_SHIFT);
    eval 'sub CAS_MIF_PHY_SHIFT () {23;}' unless defined(&CAS_MIF_PHY_SHIFT);
    eval 'sub CAS_MIF_CONFIG_PHY_SEL () {0x1;}' unless defined(&CAS_MIF_CONFIG_PHY_SEL);
    eval 'sub CAS_MIF_CONFIG_POLL_ENA () {0x2;}' unless defined(&CAS_MIF_CONFIG_POLL_ENA);
    eval 'sub CAS_MIF_CONFIG_BB_ENA () {0x4;}' unless defined(&CAS_MIF_CONFIG_BB_ENA);
    eval 'sub CAS_MIF_CONFIG_REG_ADR () {0xf8;}' unless defined(&CAS_MIF_CONFIG_REG_ADR);
    eval 'sub CAS_MIF_CONFIG_MDI0 () {0x100;}' unless defined(&CAS_MIF_CONFIG_MDI0);
    eval 'sub CAS_MIF_CONFIG_MDI1 () {0x200;}' unless defined(&CAS_MIF_CONFIG_MDI1);
    eval 'sub CAS_MIF_CONFIG_PHY_ADR () {0x7c00;}' unless defined(&CAS_MIF_CONFIG_PHY_ADR);
    eval 'sub CAS_MIF_STATUS () {0xffff;}' unless defined(&CAS_MIF_STATUS);
    eval 'sub CAS_MIF_BASIC () {0xffff0000;}' unless defined(&CAS_MIF_BASIC);
    eval 'sub CAS_MII_CONTROL () {0x9000;}' unless defined(&CAS_MII_CONTROL);
    eval 'sub CAS_MII_STATUS () {0x9004;}' unless defined(&CAS_MII_STATUS);
    eval 'sub CAS_MII_ANAR () {0x9008;}' unless defined(&CAS_MII_ANAR);
    eval 'sub CAS_MII_ANLPAR () {0x900c;}' unless defined(&CAS_MII_ANLPAR);
    eval 'sub CAS_MII_CONFIG () {0x9010;}' unless defined(&CAS_MII_CONFIG);
    eval 'sub CAS_MII_STATE_MACHINE () {0x9014;}' unless defined(&CAS_MII_STATE_MACHINE);
    eval 'sub CAS_MII_INTERRUP_STATUS () {0x9018;}' unless defined(&CAS_MII_INTERRUP_STATUS);
    eval 'sub CAS_MII_DATAPATH_MODE () {0x9050;}' unless defined(&CAS_MII_DATAPATH_MODE);
    eval 'sub CAS_MII_SLINK_CONTROL () {0x9054;}' unless defined(&CAS_MII_SLINK_CONTROL);
    eval 'sub CAS_MII_OUTPUT_SELECT () {0x9058;}' unless defined(&CAS_MII_OUTPUT_SELECT);
    eval 'sub CAS_MII_SLINK_STATUS () {0x905c;}' unless defined(&CAS_MII_SLINK_STATUS);
    eval 'sub CAS_MII_PACKET_COUNT () {0x9060;}' unless defined(&CAS_MII_PACKET_COUNT);
    eval 'sub CAS_MII_CONTROL_RESET () {0x8000;}' unless defined(&CAS_MII_CONTROL_RESET);
    eval 'sub CAS_MII_CONTROL_LOOPBK () {0x4000;}' unless defined(&CAS_MII_CONTROL_LOOPBK);
    eval 'sub CAS_MII_CONTROL_1000M () {0x2000;}' unless defined(&CAS_MII_CONTROL_1000M);
    eval 'sub CAS_MII_CONTROL_AUTONEG () {0x1000;}' unless defined(&CAS_MII_CONTROL_AUTONEG);
    eval 'sub CAS_MII_CONTROL_POWERDN () {0x800;}' unless defined(&CAS_MII_CONTROL_POWERDN);
    eval 'sub CAS_MII_CONTROL_ISOLATE () {0x400;}' unless defined(&CAS_MII_CONTROL_ISOLATE);
    eval 'sub CAS_MII_CONTROL_RAN () {0x200;}' unless defined(&CAS_MII_CONTROL_RAN);
    eval 'sub CAS_MII_CONTROL_FDUPLEX () {0x100;}' unless defined(&CAS_MII_CONTROL_FDUPLEX);
    eval 'sub CAS_MII_CONTROL_COL_TST () {0x80;}' unless defined(&CAS_MII_CONTROL_COL_TST);
    eval 'sub CAS_MII_STATUS_GB_FDX () {0x400;}' unless defined(&CAS_MII_STATUS_GB_FDX);
    eval 'sub CAS_MII_STATUS_GB_HDX () {0x200;}' unless defined(&CAS_MII_STATUS_GB_HDX);
    eval 'sub CAS_MII_STATUS_UNK () {0x100;}' unless defined(&CAS_MII_STATUS_UNK);
    eval 'sub CAS_MII_STATUS_ANEG_CPT () {0x20;}' unless defined(&CAS_MII_STATUS_ANEG_CPT);
    eval 'sub CAS_MII_STATUS_REM_FLT () {0x10;}' unless defined(&CAS_MII_STATUS_REM_FLT);
    eval 'sub CAS_MII_STATUS_ACFG () {0x8;}' unless defined(&CAS_MII_STATUS_ACFG);
    eval 'sub CAS_MII_STATUS_LINK_STS () {0x4;}' unless defined(&CAS_MII_STATUS_LINK_STS);
    eval 'sub CAS_MII_STATUS_JABBER () {0x2;}' unless defined(&CAS_MII_STATUS_JABBER);
    eval 'sub CAS_MII_STATUS_EXTCAP () {0x1;}' unless defined(&CAS_MII_STATUS_EXTCAP);
    eval 'sub CAS_MII_ANEG_NP () {0x8000;}' unless defined(&CAS_MII_ANEG_NP);
    eval 'sub CAS_MII_ANEG_ACK () {0x4000;}' unless defined(&CAS_MII_ANEG_ACK);
    eval 'sub CAS_MII_ANEG_RF () {0x3000;}' unless defined(&CAS_MII_ANEG_RF);
    eval 'sub CAS_MII_ANEG_ASYM_PAUSE () {0x100;}' unless defined(&CAS_MII_ANEG_ASYM_PAUSE);
    eval 'sub CAS_MII_ANEG_SYM_PAUSE () {0x80;}' unless defined(&CAS_MII_ANEG_SYM_PAUSE);
    eval 'sub CAS_MII_ANEG_HLF_DUPLX () {0x40;}' unless defined(&CAS_MII_ANEG_HLF_DUPLX);
    eval 'sub CAS_MII_ANEG_FUL_DUPLX () {0x20;}' unless defined(&CAS_MII_ANEG_FUL_DUPLX);
    eval 'sub CAS_MII_CONFIG_TIMER () {0xe;}' unless defined(&CAS_MII_CONFIG_TIMER);
    eval 'sub CAS_MII_CONFIG_ANTO () {0x20;}' unless defined(&CAS_MII_CONFIG_ANTO);
    eval 'sub CAS_MII_CONFIG_JS () {0x18;}' unless defined(&CAS_MII_CONFIG_JS);
    eval 'sub CAS_MII_CONFIG_SDL () {0x4;}' unless defined(&CAS_MII_CONFIG_SDL);
    eval 'sub CAS_MII_CONFIG_SDO () {0x2;}' unless defined(&CAS_MII_CONFIG_SDO);
    eval 'sub CAS_MII_CONFIG_ENABLE () {0x1;}' unless defined(&CAS_MII_CONFIG_ENABLE);
    eval 'sub CAS_MII_FSM_STOP () {0x;}' unless defined(&CAS_MII_FSM_STOP);
    eval 'sub CAS_MII_FSM_RUN () {0x1;}' unless defined(&CAS_MII_FSM_RUN);
    eval 'sub CAS_MII_FSM_UNKWN () {0x100;}' unless defined(&CAS_MII_FSM_UNKWN);
    eval 'sub CAS_MII_FSM_DONE () {0x101;}' unless defined(&CAS_MII_FSM_DONE);
    eval 'sub CAS_MII_INTERRUP_LINK () {0x2;}' unless defined(&CAS_MII_INTERRUP_LINK);
    eval 'sub CAS_MII_DATAPATH_SERIAL () {0x1;}' unless defined(&CAS_MII_DATAPATH_SERIAL);
    eval 'sub CAS_MII_DATAPATH_SERDES () {0x2;}' unless defined(&CAS_MII_DATAPATH_SERDES);
    eval 'sub CAS_MII_DATAPATH_MII () {0x4;}' unless defined(&CAS_MII_DATAPATH_MII);
    eval 'sub CAS_MII_DATAPATH_MIIOUT () {0x8;}' unless defined(&CAS_MII_DATAPATH_MIIOUT);
    eval 'sub CAS_MII_SLINK_LOOPBACK () {0x1;}' unless defined(&CAS_MII_SLINK_LOOPBACK);
    eval 'sub CAS_MII_SLINK_EN_SYNC_D () {0x2;}' unless defined(&CAS_MII_SLINK_EN_SYNC_D);
    eval 'sub CAS_MII_SLINK_LOCK_REF () {0x4;}' unless defined(&CAS_MII_SLINK_LOCK_REF);
    eval 'sub CAS_MII_SLINK_EMPHASIS () {0x8;}' unless defined(&CAS_MII_SLINK_EMPHASIS);
    eval 'sub CAS_MII_SLINK_SELFTEST () {0x1c0;}' unless defined(&CAS_MII_SLINK_SELFTEST);
    eval 'sub CAS_MII_SLINK_POWER_OFF () {0x200;}' unless defined(&CAS_MII_SLINK_POWER_OFF);
    eval 'sub CAS_MII_SLINK_TEST () {0x;}' unless defined(&CAS_MII_SLINK_TEST);
    eval 'sub CAS_MII_SLINK_LOCKED () {0x1;}' unless defined(&CAS_MII_SLINK_LOCKED);
    eval 'sub CAS_MII_SLINK_COMMA () {0x2;}' unless defined(&CAS_MII_SLINK_COMMA);
    eval 'sub CAS_MII_SLINK_SYNC () {0x3;}' unless defined(&CAS_MII_SLINK_SYNC);
    eval 'sub CAS_PHYAD_INTERNAL () {1;}' unless defined(&CAS_PHYAD_INTERNAL);
    eval 'sub CAS_PHYAD_EXTERNAL () {0;}' unless defined(&CAS_PHYAD_EXTERNAL);
    eval 'sub CAS_TD_BUFSIZE () {0x7fff;}' unless defined(&CAS_TD_BUFSIZE);
    eval 'sub CAS_TD_CXSUM_START () {0x1f8000;}' unless defined(&CAS_TD_CXSUM_START);
    eval 'sub CAS_TD_CXSUM_STARTSHFT () {15;}' unless defined(&CAS_TD_CXSUM_STARTSHFT);
    eval 'sub CAS_TD_CXSUM_STUFF () {0x1fe00000;}' unless defined(&CAS_TD_CXSUM_STUFF);
    eval 'sub CAS_TD_CXSUM_STUFFSHFT () {21;}' unless defined(&CAS_TD_CXSUM_STUFFSHFT);
    eval 'sub CAS_TD_CXSUM_ENABLE () {0x20000000;}' unless defined(&CAS_TD_CXSUM_ENABLE);
    eval 'sub CAS_TD_END_OF_PACKET () {0x40000000;}' unless defined(&CAS_TD_END_OF_PACKET);
    eval 'sub CAS_TD_START_OF_PACKET () {0x80000000;}' unless defined(&CAS_TD_START_OF_PACKET);
    eval 'sub CAS_TD_INTERRUPT_ME () {0x100000000;}' unless defined(&CAS_TD_INTERRUPT_ME);
    eval 'sub CAS_TD_NO_CRC () {0x200000000;}' unless defined(&CAS_TD_NO_CRC);
    eval 'sub CAS_RC0_TYPE () {0xc000000000000000;}' unless defined(&CAS_RC0_TYPE);
    eval 'sub CAS_RC0_RELEASE_HDR () {0x2000000000000000;}' unless defined(&CAS_RC0_RELEASE_HDR);
    eval 'sub CAS_RC0_RELEASE_DATA () {0x1000000000000000;}' unless defined(&CAS_RC0_RELEASE_DATA);
    eval 'sub CAS_RC0_SPLIT () {0x400000000000000;}' unless defined(&CAS_RC0_SPLIT);
    eval 'sub CAS_RC0_SKIP_MASK () {0x180000000000000;}' unless defined(&CAS_RC0_SKIP_MASK);
    eval 'sub CAS_RC0_SKIP_SHIFT () {55;}' unless defined(&CAS_RC0_SKIP_SHIFT);
    eval 'sub CAS_RC0_DATA_IDX_MASK () {0x7ffe0000000000;}' unless defined(&CAS_RC0_DATA_IDX_MASK);
    eval 'sub CAS_RC0_DATA_IDX_SHIFT () {41;}' unless defined(&CAS_RC0_DATA_IDX_SHIFT);
    eval 'sub CAS_RC0_DATA_OFF_MASK () {0x1fff8000000;}' unless defined(&CAS_RC0_DATA_OFF_MASK);
    eval 'sub CAS_RC0_DATA_OFF_SHIFT () {27;}' unless defined(&CAS_RC0_DATA_OFF_SHIFT);
    eval 'sub CAS_RC0_DATA_LEN_MASK () {0x7ffe000;}' unless defined(&CAS_RC0_DATA_LEN_MASK);
    eval 'sub CAS_RC0_DATA_LEN_SHIFT () {13;}' unless defined(&CAS_RC0_DATA_LEN_SHIFT);
    eval 'sub CAS_RC0_SKIP {
        my($w) = @_;
	    eval q(((($w) &  &CAS_RC0_SKIP_MASK) >>  &CAS_RC0_SKIP_SHIFT));
    }' unless defined(&CAS_RC0_SKIP);
    eval 'sub CAS_RC0_DATA_IDX {
        my($w) = @_;
	    eval q(((($w) &  &CAS_RC0_DATA_IDX_MASK) >>  &CAS_RC0_DATA_IDX_SHIFT));
    }' unless defined(&CAS_RC0_DATA_IDX);
    eval 'sub CAS_RC0_DATA_OFF {
        my($w) = @_;
	    eval q(((($w) &  &CAS_RC0_DATA_OFF_MASK) >>  &CAS_RC0_DATA_OFF_SHIFT));
    }' unless defined(&CAS_RC0_DATA_OFF);
    eval 'sub CAS_RC0_DATA_LEN {
        my($w) = @_;
	    eval q(((($w) &  &CAS_RC0_DATA_LEN_MASK) >>  &CAS_RC0_DATA_LEN_SHIFT));
    }' unless defined(&CAS_RC0_DATA_LEN);
    eval 'sub CAS_RC1_HDR_IDX_MASK () {0xfffc000000000000;}' unless defined(&CAS_RC1_HDR_IDX_MASK);
    eval 'sub CAS_RC1_HDR_IDX_SHIFT () {50;}' unless defined(&CAS_RC1_HDR_IDX_SHIFT);
    eval 'sub CAS_RC1_HDR_OFF_MASK () {0x3f00000000000;}' unless defined(&CAS_RC1_HDR_OFF_MASK);
    eval 'sub CAS_RC1_HDR_OFF_SHIFT () {44;}' unless defined(&CAS_RC1_HDR_OFF_SHIFT);
    eval 'sub CAS_RC1_HDR_LEN_MASK () {0xff800000000;}' unless defined(&CAS_RC1_HDR_LEN_MASK);
    eval 'sub CAS_RC1_HDR_LEN_SHIFT () {35;}' unless defined(&CAS_RC1_HDR_LEN_SHIFT);
    eval 'sub CAS_RC1_HDR_IDX {
        my($w) = @_;
	    eval q(((($w) &  &CAS_RC1_HDR_IDX_MASK) >>  &CAS_RC1_HDR_IDX_SHIFT));
    }' unless defined(&CAS_RC1_HDR_IDX);
    eval 'sub CAS_RC1_HDR_OFF {
        my($w) = @_;
	    eval q(((($w) &  &CAS_RC1_HDR_OFF_MASK) >>  &CAS_RC1_HDR_OFF_SHIFT));
    }' unless defined(&CAS_RC1_HDR_OFF);
    eval 'sub CAS_RC1_HDR_LEN {
        my($w) = @_;
	    eval q(((($w) &  &CAS_RC1_HDR_LEN_MASK) >>  &CAS_RC1_HDR_LEN_SHIFT));
    }' unless defined(&CAS_RC1_HDR_LEN);
    eval 'sub CAS_RC3_OWN () {0x80000000000;}' unless defined(&CAS_RC3_OWN);
}
1;
